rr_graph area estimator adopted RRGraph object
This commit is contained in:
tangxifan
parent
12a8f79869
commit
a99835e1c1
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@ -33,7 +33,7 @@ static void count_unidir_routing_transistors(std::vector<t_segment_inf>& segment
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float R_minW_pmos,
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const float trans_sram_bit);
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static float get_cblock_trans(int* num_inputs_to_cblock, int wire_to_ipin_switch, int max_inputs_to_cblock, float trans_sram_bit);
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static float get_cblock_trans(const vtr::vector<RRNodeId, int>& num_inputs_to_cblock, int wire_to_ipin_switch, int max_inputs_to_cblock, float trans_sram_bit);
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static float* alloc_and_load_unsharable_switch_trans(int num_switch,
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float trans_sram_bit,
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@ -101,7 +101,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
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* optimistic (but I still think it's pretty reasonable). */
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auto& device_ctx = g_vpr_ctx.device();
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int* num_inputs_to_cblock; /* [0..device_ctx.rr_nodes.size()-1], but all entries not */
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vtr::vector<RRNodeId, int> num_inputs_to_cblock; /* [0..device_ctx.rr_nodes.size()-1], but all entries not */
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/* corresponding to IPINs will be 0. */
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@ -110,7 +110,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
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float *unsharable_switch_trans, *sharable_switch_trans; /* [0..num_switch-1] */
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t_rr_type from_rr_type, to_rr_type;
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int iedge, num_edges, maxlen;
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int maxlen;
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int iswitch, i, j, iseg, max_inputs_to_cblock;
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float input_cblock_trans, shared_opin_buffer_trans;
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@ -144,7 +144,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
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trans_track_to_cblock_buf = 0;
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}
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num_inputs_to_cblock = (int*)vtr::calloc(device_ctx.rr_nodes.size(), sizeof(int));
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num_inputs_to_cblock.resize(device_ctx.rr_graph.nodes().size(), 0);
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maxlen = std::max(device_ctx.grid.width(), device_ctx.grid.height());
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cblock_counted = (bool*)vtr::calloc(maxlen, sizeof(bool));
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@ -156,29 +156,27 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
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sharable_switch_trans = alloc_and_load_sharable_switch_trans(num_switch,
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R_minW_nmos, R_minW_pmos);
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for (size_t from_node = 0; from_node < device_ctx.rr_nodes.size(); from_node++) {
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from_rr_type = device_ctx.rr_nodes[from_node].type();
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for (const RRNodeId& from_node : device_ctx.rr_graph.nodes()) {
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from_rr_type = device_ctx.rr_graph.node_type(from_node);
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switch (from_rr_type) {
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case CHANX:
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case CHANY:
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num_edges = device_ctx.rr_nodes[from_node].num_edges();
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for (iedge = 0; iedge < num_edges; iedge++) {
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size_t to_node = device_ctx.rr_nodes[from_node].edge_sink_node(iedge);
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to_rr_type = device_ctx.rr_nodes[to_node].type();
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for (const RREdgeId& iedge : device_ctx.rr_graph.node_out_edges(from_node)) {
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RRNodeId to_node = device_ctx.rr_graph.edge_sink_node(iedge);
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to_rr_type = device_ctx.rr_graph.node_type(to_node);
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/* Ignore any uninitialized rr_graph nodes */
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if ((device_ctx.rr_nodes[to_node].type() == SOURCE)
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&& (device_ctx.rr_nodes[to_node].xlow() == 0) && (device_ctx.rr_nodes[to_node].ylow() == 0)
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&& (device_ctx.rr_nodes[to_node].xhigh() == 0) && (device_ctx.rr_nodes[to_node].yhigh() == 0)) {
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if ((device_ctx.rr_graph.node_type(to_node) == SOURCE)
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&& (device_ctx.rr_graph.node_xlow(to_node) == 0) && (device_ctx.rr_graph.node_ylow(to_node) == 0)
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&& (device_ctx.rr_graph.node_xhigh(to_node) == 0) && (device_ctx.rr_graph.node_yhigh(to_node) == 0)) {
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continue;
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}
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switch (to_rr_type) {
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case CHANX:
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case CHANY:
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iswitch = device_ctx.rr_nodes[from_node].edge_switch(iedge);
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iswitch = (short)size_t(device_ctx.rr_graph.edge_switch(iedge));
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if (device_ctx.rr_switch_inf[iswitch].buffered()) {
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iseg = seg_index_of_sblock(from_node, to_node);
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@ -214,8 +212,8 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
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default:
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VPR_ERROR(VPR_ERROR_ROUTE,
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"in count_routing_transistors:\n"
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"\tUnexpected connection from node %d (type %s) to node %d (type %s).\n",
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from_node, rr_node_typename[from_rr_type], to_node, rr_node_typename[to_rr_type]);
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"\tUnexpected connection from node %ld (type %s) to node %ld (type %s).\n",
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size_t(from_node), rr_node_typename[from_rr_type], size_t(to_node), rr_node_typename[to_rr_type]);
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break;
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} /* End switch on to_rr_type. */
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@ -225,35 +223,34 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
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/* Now add in the shared buffer transistors, and reset some flags. */
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if (from_rr_type == CHANX) {
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for (i = device_ctx.rr_nodes[from_node].xlow() - 1;
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i <= device_ctx.rr_nodes[from_node].xhigh(); i++) {
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for (i = device_ctx.rr_graph.node_xlow(from_node) - 1;
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i <= device_ctx.rr_graph.node_xhigh(from_node); i++) {
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ntrans_sharing += shared_buffer_trans[i];
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shared_buffer_trans[i] = 0.;
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}
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for (i = device_ctx.rr_nodes[from_node].xlow(); i <= device_ctx.rr_nodes[from_node].xhigh();
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for (i = device_ctx.rr_graph.node_xlow(from_node); i <= device_ctx.rr_graph.node_xhigh(from_node);
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i++)
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cblock_counted[i] = false;
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} else { /* CHANY */
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for (j = device_ctx.rr_nodes[from_node].ylow() - 1;
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j <= device_ctx.rr_nodes[from_node].yhigh(); j++) {
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for (j = device_ctx.rr_graph.node_ylow(from_node) - 1;
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j <= device_ctx.rr_graph.node_yhigh(from_node); j++) {
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ntrans_sharing += shared_buffer_trans[j];
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shared_buffer_trans[j] = 0.;
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}
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for (j = device_ctx.rr_nodes[from_node].ylow(); j <= device_ctx.rr_nodes[from_node].yhigh();
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for (j = device_ctx.rr_graph.node_ylow(from_node); j <= device_ctx.rr_graph.node_yhigh(from_node);
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j++)
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cblock_counted[j] = false;
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}
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break;
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case OPIN:
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num_edges = device_ctx.rr_nodes[from_node].num_edges();
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shared_opin_buffer_trans = 0.;
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for (iedge = 0; iedge < num_edges; iedge++) {
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iswitch = device_ctx.rr_nodes[from_node].edge_switch(iedge);
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for (const RREdgeId& iedge : device_ctx.rr_graph.node_out_edges(from_node)) {
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iswitch = (short)size_t(device_ctx.rr_graph.edge_switch(iedge));
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ntrans_no_sharing += unsharable_switch_trans[iswitch]
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+ sharable_switch_trans[iswitch];
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ntrans_sharing += unsharable_switch_trans[iswitch];
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@ -281,7 +278,7 @@ void count_bidir_routing_transistors(int num_switch, int wire_to_ipin_switch, fl
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input_cblock_trans = get_cblock_trans(num_inputs_to_cblock, wire_to_ipin_switch,
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max_inputs_to_cblock, trans_sram_bit);
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free(num_inputs_to_cblock);
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num_inputs_to_cblock.clear();
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ntrans_sharing += input_cblock_trans;
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ntrans_no_sharing += input_cblock_trans;
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@ -303,13 +300,12 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
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auto& device_ctx = g_vpr_ctx.device();
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bool* cblock_counted; /* [0..max(device_ctx.grid.width(),device_ctx.grid.height())] -- 0th element unused. */
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int* num_inputs_to_cblock; /* [0..device_ctx.rr_nodes.size()-1], but all entries not */
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vtr::vector<RRNodeId, int> num_inputs_to_cblock; /* [0..device_ctx.rr_nodes.size()-1], but all entries not */
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/* corresponding to IPINs will be 0. */
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t_rr_type from_rr_type, to_rr_type;
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int i, j, iseg, iedge, num_edges, maxlen;
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RRNodeId to_node;
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int i, j, iseg, maxlen;
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int max_inputs_to_cblock;
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float input_cblock_trans;
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@ -318,8 +314,7 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
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* a single mux. We should count this mux only once as we look at the outgoing
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* switches of all rr nodes. Thus we keep track of which muxes we have already
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* counted via the variable below. */
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bool* chan_node_switch_done;
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chan_node_switch_done = (bool*)vtr::calloc(device_ctx.rr_graph.nodes().size(), sizeof(bool));
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vtr::vector<RRNodeId, bool> chan_node_switch_done(device_ctx.rr_graph.nodes().size(), false);
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/* The variable below is an accumulator variable that will add up all the *
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* transistors in the routing. Make double so that it doesn't stop *
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@ -349,7 +344,7 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
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trans_track_to_cblock_buf = 0;
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}
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num_inputs_to_cblock = (int*)vtr::calloc(device_ctx.rr_graph.nodes().size(), sizeof(int));
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num_inputs_to_cblock.resize(device_ctx.rr_graph.nodes().size(), 0);
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maxlen = std::max(device_ctx.grid.width(), device_ctx.grid.height());
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cblock_counted = (bool*)vtr::calloc(maxlen, sizeof(bool));
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@ -376,10 +371,10 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
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case CHANX:
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case CHANY:
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if (!chan_node_switch_done[to_node]) {
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int switch_index = device_ctx.rr_nodes[from_node].edge_switch(iedge);
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int switch_index = (int)size_t(device_ctx.rr_graph.edge_switch(iedge));
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auto switch_type = device_ctx.rr_switch_inf[switch_index].type();
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int fan_in = device_ctx.rr_nodes[to_node].fan_in();
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int fan_in = device_ctx.rr_graph.node_in_edges(to_node).size();
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if (device_ctx.rr_switch_inf[switch_index].type() == SwitchType::MUX) {
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/* Each wire segment begins with a multipexer followed by a driver for unidirectional */
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@ -433,8 +428,8 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
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default:
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VPR_ERROR(VPR_ERROR_ROUTE,
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"in count_routing_transistors:\n"
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"\tUnexpected connection from node %d (type %d) to node %d (type %d).\n",
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from_node, from_rr_type, to_node, to_rr_type);
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"\tUnexpected connection from node %ld (type %d) to node %ld (type %d).\n",
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size_t(from_node), from_rr_type, size_t(to_node), to_rr_type);
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break;
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} /* End switch on to_rr_type. */
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@ -443,11 +438,11 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
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/* Reset some flags */
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if (from_rr_type == CHANX) {
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for (i = device_ctx.rr_nodes[from_node].xlow(); i <= device_ctx.rr_nodes[from_node].xhigh(); i++)
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for (i = device_ctx.rr_graph.node_xlow(from_node); i <= device_ctx.rr_graph.node_xhigh(from_node); i++)
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cblock_counted[i] = false;
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} else { /* CHANY */
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for (j = device_ctx.rr_nodes[from_node].ylow(); j <= device_ctx.rr_nodes[from_node].yhigh();
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for (j = device_ctx.rr_graph.node_ylow(from_node); j <= device_ctx.rr_graph.node_yhigh(from_node);
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j++)
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cblock_counted[j] = false;
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}
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@ -467,8 +462,8 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
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max_inputs_to_cblock, trans_sram_bit);
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free(cblock_counted);
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free(num_inputs_to_cblock);
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free(chan_node_switch_done);
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num_inputs_to_cblock.clear();
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chan_node_switch_done.clear();
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ntrans += input_cblock_trans;
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@ -477,7 +472,7 @@ void count_unidir_routing_transistors(std::vector<t_segment_inf>& /*segment_inf*
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VTR_LOG("\tTotal routing area: %#g, per logic tile: %#g\n", ntrans, ntrans / (float)(device_ctx.grid.width() * device_ctx.grid.height()));
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}
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static float get_cblock_trans(int* num_inputs_to_cblock, int wire_to_ipin_switch, int max_inputs_to_cblock, float trans_sram_bit) {
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static float get_cblock_trans(const vtr::vector<RRNodeId, int>& num_inputs_to_cblock, int wire_to_ipin_switch, int max_inputs_to_cblock, float trans_sram_bit) {
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/* Computes the transistors in the input connection block multiplexers and *
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* the buffers from connection block outputs to the logic block input pins. *
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* For speed, I precompute the number of transistors in the multiplexers of *
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@ -505,7 +500,7 @@ static float get_cblock_trans(int* num_inputs_to_cblock, int wire_to_ipin_switch
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trans_count = 0.;
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for (size_t i = 0; i < device_ctx.rr_nodes.size(); i++) {
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for (const RRNodeId& i : device_ctx.rr_graph.nodes()) {
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num_inputs = num_inputs_to_cblock[i];
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trans_count += trans_per_cblock[num_inputs];
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}
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@ -6,20 +6,20 @@
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#include "globals.h"
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#include "rr_graph_util.h"
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int seg_index_of_cblock(t_rr_type from_rr_type, int to_node) {
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int seg_index_of_cblock(t_rr_type from_rr_type, const RRNodeId& to_node) {
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/* Returns the segment number (distance along the channel) of the connection *
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* box from from_rr_type (CHANX or CHANY) to to_node (IPIN). */
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auto& device_ctx = g_vpr_ctx.device();
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if (from_rr_type == CHANX)
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return (device_ctx.rr_nodes[to_node].xlow());
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return (device_ctx.rr_graph.node_xlow(to_node));
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else
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/* CHANY */
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return (device_ctx.rr_nodes[to_node].ylow());
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return (device_ctx.rr_graph.node_ylow(to_node));
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}
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int seg_index_of_sblock(int from_node, int to_node) {
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int seg_index_of_sblock(const RRNodeId& from_node, const RRNodeId& to_node) {
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/* Returns the segment number (distance along the channel) of the switch box *
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* box from from_node (CHANX or CHANY) to to_node (CHANX or CHANY). The *
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* switch box on the left side of a CHANX segment at (i,j) has seg_index = *
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@ -31,47 +31,47 @@ int seg_index_of_sblock(int from_node, int to_node) {
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auto& device_ctx = g_vpr_ctx.device();
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from_rr_type = device_ctx.rr_nodes[from_node].type();
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to_rr_type = device_ctx.rr_nodes[to_node].type();
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from_rr_type = device_ctx.rr_graph.node_type(from_node);
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to_rr_type = device_ctx.rr_graph.node_type(to_node);
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if (from_rr_type == CHANX) {
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if (to_rr_type == CHANY) {
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return (device_ctx.rr_nodes[to_node].xlow());
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return (device_ctx.rr_graph.node_xlow(to_node));
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} else if (to_rr_type == CHANX) {
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if (device_ctx.rr_nodes[to_node].xlow() > device_ctx.rr_nodes[from_node].xlow()) { /* Going right */
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return (device_ctx.rr_nodes[from_node].xhigh());
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if (device_ctx.rr_graph.node_xlow(to_node) > device_ctx.rr_graph.node_xlow(from_node)) { /* Going right */
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return (device_ctx.rr_graph.node_xhigh(from_node));
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} else { /* Going left */
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return (device_ctx.rr_nodes[to_node].xhigh());
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return (device_ctx.rr_graph.node_xhigh(to_node));
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}
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} else {
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VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
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"in seg_index_of_sblock: to_node %d is of type %d.\n",
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to_node, to_rr_type);
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"in seg_index_of_sblock: to_node %ld is of type %d.\n",
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size_t(to_node), to_rr_type);
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return OPEN; //Should not reach here once thrown
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}
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}
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/* End from_rr_type is CHANX */
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else if (from_rr_type == CHANY) {
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if (to_rr_type == CHANX) {
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return (device_ctx.rr_nodes[to_node].ylow());
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return (device_ctx.rr_graph.node_ylow(to_node));
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} else if (to_rr_type == CHANY) {
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if (device_ctx.rr_nodes[to_node].ylow() > device_ctx.rr_nodes[from_node].ylow()) { /* Going up */
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return (device_ctx.rr_nodes[from_node].yhigh());
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if (device_ctx.rr_graph.node_ylow(to_node) > device_ctx.rr_graph.node_ylow(from_node)) { /* Going up */
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return (device_ctx.rr_graph.node_yhigh(from_node));
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} else { /* Going down */
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return (device_ctx.rr_nodes[to_node].yhigh());
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return (device_ctx.rr_graph.node_yhigh(to_node));
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}
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} else {
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VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
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"in seg_index_of_sblock: to_node %d is of type %d.\n",
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to_node, to_rr_type);
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"in seg_index_of_sblock: to_node %ld is of type %d.\n",
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size_t(to_node), to_rr_type);
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return OPEN; //Should not reach here once thrown
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}
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}
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/* End from_rr_type is CHANY */
|
||||
else {
|
||||
VPR_FATAL_ERROR(VPR_ERROR_ROUTE,
|
||||
"in seg_index_of_sblock: from_node %d is of type %d.\n",
|
||||
from_node, from_rr_type);
|
||||
"in seg_index_of_sblock: from_node %ld is of type %d.\n",
|
||||
size_t(from_node), from_rr_type);
|
||||
return OPEN; //Should not reach here once thrown
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
#ifndef RR_GRAPH_UTIL_H
|
||||
#define RR_GRAPH_UTIL_H
|
||||
|
||||
int seg_index_of_cblock(t_rr_type from_rr_type, int to_node);
|
||||
int seg_index_of_cblock(t_rr_type from_rr_type, const RRNodeId& to_node);
|
||||
|
||||
int seg_index_of_sblock(int from_node, int to_node);
|
||||
int seg_index_of_sblock(const RRNodeId& from_node, const RRNodeId& to_node);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue