riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

[lib] update vtr to latest

This commit is contained in:
tangxifan 2024-10-07 13:21:52 -07:00
parent a5dc98bb37
commit a8f322f588
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
vtr-verilog-to-routing

@ -1 +1 @@
Subproject commit 9eef18c4facb5dad0604682e6e5d3d904b97f6d8 Subproject commit 83f8bfeb065b48b1f860faf88a65fef625f79d56