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[core] now verbose mode is applicable to more build top module cb instances

This commit is contained in:
tangxifan 2024-07-04 14:22:30 -07:00
parent 4b53e57c92
commit a8850d4f0f
3 changed files with 10 additions and 6 deletions
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2
openfpga/src/fabric/build_top_module.cpp
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@ -79,7 +79,7 @@ int build_top_module(
rr_clock_lookup, vpr_device_annotation, grids, layer, tile_annotation, rr_clock_lookup, vpr_device_annotation, grids, layer, tile_annotation,
rr_graph, device_rr_gsb, tile_direct, arch_direct, config_protocol, rr_graph, device_rr_gsb, tile_direct, arch_direct, config_protocol,
sram_model, frame_view, compact_routing_hierarchy, duplicate_grid_pin, sram_model, frame_view, compact_routing_hierarchy, duplicate_grid_pin,
fabric_key, group_config_block); fabric_key, group_config_block, verbose);
} else { } else {
/* Build the tile instances under the top module */ /* Build the tile instances under the top module */
status = build_top_module_tile_child_instances( status = build_top_module_tile_child_instances(

11
openfpga/src/fabric/build_top_module_child_fine_grained_instance.cpp
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@ -244,7 +244,7 @@ static vtr::Matrix<size_t> add_top_module_switch_block_instances(
static vtr::Matrix<size_t> add_top_module_connection_block_instances( static vtr::Matrix<size_t> add_top_module_connection_block_instances(
ModuleManager& module_manager, const ModuleId& top_module, ModuleManager& module_manager, const ModuleId& top_module,
const DeviceRRGSB& device_rr_gsb, const t_rr_type& cb_type, const DeviceRRGSB& device_rr_gsb, const t_rr_type& cb_type,
const bool& compact_routing_hierarchy) { const bool& compact_routing_hierarchy, const bool& verbose) {
vtr::ScopedStartFinishTimer timer( vtr::ScopedStartFinishTimer timer(
"Add connection block instances to top module"); "Add connection block instances to top module");
@ -264,6 +264,7 @@ static vtr::Matrix<size_t> add_top_module_connection_block_instances(
vtr::Point<size_t> cb_coordinate(rr_gsb.get_cb_x(cb_type), vtr::Point<size_t> cb_coordinate(rr_gsb.get_cb_x(cb_type),
rr_gsb.get_cb_y(cb_type)); rr_gsb.get_cb_y(cb_type));
if (false == rr_gsb.is_cb_exist(cb_type)) { if (false == rr_gsb.is_cb_exist(cb_type)) {
VTR_LOGV(verbose, "Skip connnection block at (%lu, %lu) as it does not exist\n", cb_coordinate.x(), cb_coordinate.y());
continue; continue;
} }
/* If we use compact routing hierarchy, we should instanciate the unique /* If we use compact routing hierarchy, we should instanciate the unique
@ -295,6 +296,7 @@ static vtr::Matrix<size_t> add_top_module_connection_block_instances(
top_module, cb_module, top_module, cb_module,
cb_instance_ids[rr_gsb.get_cb_x(cb_type)][rr_gsb.get_cb_y(cb_type)], cb_instance_ids[rr_gsb.get_cb_x(cb_type)][rr_gsb.get_cb_y(cb_type)],
cb_instance_name); cb_instance_name);
VTR_LOGV(verbose, "Added connnection block '%s' (module '%s')\n", cb_instance_name.c_str(), cb_module_name.c_str());
} }
} }
@ -445,7 +447,8 @@ int build_top_module_fine_grained_child_instances(
const ConfigProtocol& config_protocol, const CircuitModelId& sram_model, const ConfigProtocol& config_protocol, const CircuitModelId& sram_model,
const bool& frame_view, const bool& compact_routing_hierarchy, const bool& frame_view, const bool& compact_routing_hierarchy,
const bool& duplicate_grid_pin, const FabricKey& fabric_key, const bool& duplicate_grid_pin, const FabricKey& fabric_key,
const bool& group_config_block) { const bool& group_config_block,
const bool& verbose) {
int status = CMD_EXEC_SUCCESS; int status = CMD_EXEC_SUCCESS;
std::map<t_rr_type, vtr::Matrix<size_t>> cb_instance_ids; std::map<t_rr_type, vtr::Matrix<size_t>> cb_instance_ids;
@ -460,10 +463,10 @@ int build_top_module_fine_grained_child_instances(
/* Add all the CBX and CBYs across the fabric */ /* Add all the CBX and CBYs across the fabric */
cb_instance_ids[CHANX] = add_top_module_connection_block_instances( cb_instance_ids[CHANX] = add_top_module_connection_block_instances(
module_manager, top_module, device_rr_gsb, CHANX, module_manager, top_module, device_rr_gsb, CHANX,
compact_routing_hierarchy); compact_routing_hierarchy, verbose);
cb_instance_ids[CHANY] = add_top_module_connection_block_instances( cb_instance_ids[CHANY] = add_top_module_connection_block_instances(
module_manager, top_module, device_rr_gsb, CHANY, module_manager, top_module, device_rr_gsb, CHANY,
compact_routing_hierarchy); compact_routing_hierarchy, verbose);
/* Update I/O children list */ /* Update I/O children list */
add_top_module_io_children(module_manager, top_module, grids, layer, add_top_module_io_children(module_manager, top_module, grids, layer,

3
openfpga/src/fabric/build_top_module_child_fine_grained_instance.h
View File

@ -44,7 +44,8 @@ int build_top_module_fine_grained_child_instances(
const ConfigProtocol& config_protocol, const CircuitModelId& sram_model, const ConfigProtocol& config_protocol, const CircuitModelId& sram_model,
const bool& frame_view, const bool& compact_routing_hierarchy, const bool& frame_view, const bool& compact_routing_hierarchy,
const bool& duplicate_grid_pin, const FabricKey& fabric_key, const bool& duplicate_grid_pin, const FabricKey& fabric_key,
const bool& group_config_block); const bool& group_config_block,
const bool& verbose);
} /* end namespace openfpga */ } /* end namespace openfpga */