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now generating simulation ini file will try to create directory first

This commit is contained in:
tangxifan 2020-04-15 20:53:37 -06:00
parent 72e8824a87
commit a7d900088b
1 changed files with 8 additions and 0 deletions
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8
openfpga/src/fpga_verilog/simulation_info_writer.cpp
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@ -12,6 +12,9 @@
#include "vtr_assert.h" #include "vtr_assert.h"
#include "vtr_time.h" #include "vtr_time.h"
/* Headers from openfpgautil library */
#include "openfpga_digest.h"
#include "simulation_utils.h" #include "simulation_utils.h"
#include "verilog_constants.h" #include "verilog_constants.h"
@ -34,6 +37,11 @@ void print_verilog_simulation_info(const std::string& ini_fname,
std::string timer_message = std::string("Write exchangeable file containing simulation information '") + ini_fname + std::string("'"); std::string timer_message = std::string("Write exchangeable file containing simulation information '") + ini_fname + std::string("'");
std::string ini_dir_path = format_dir_path(find_path_dir_name(ini_fname));
/* Create directories */
create_directory(ini_dir_path);
/* Start time count */ /* Start time count */
vtr::ScopedStartFinishTimer timer(timer_message); vtr::ScopedStartFinishTimer timer(timer_message);