riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

add rr_switch binding in link openfpga arch command

This commit is contained in:
tangxifan 2020-02-12 10:52:20 -07:00
parent feccbc5780
commit a736e09c29
4 changed files with 88 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

75
openfpga/src/annotation/annotate_rr_gsb.cpp → openfpga/src/annotation/annotate_rr_graph.cpp
View File

@ -13,11 +13,13 @@
/* Headers from vpr library */
#include "rr_graph_obj_util.h"
#include "annotate_rr_gsb.h"
#include "annotate_rr_graph.h"
/* begin namespace openfpga */
namespace openfpga {
constexpr char* VPR_DELAYLESS_SWITCH_NAME = "__vpr_delayless_switch__";
/* Build a RRChan Object with the given channel type and coorindators */
static
RRChan build_one_rr_chan(const DeviceContext& vpr_device_ctx,
@ -392,4 +394,75 @@ void annotate_device_rr_gsb(const DeviceContext& vpr_device_ctx,
gsb_range.x() * gsb_range.y());
}
/********************************************************************
* Build the link between rr_graph switches to their physical circuit models
* The binding is done based on the name of rr_switches defined in the
* OpenFPGA arch XML
*******************************************************************/
static
void annotate_rr_switch_circuit_models(const DeviceContext& vpr_device_ctx,
const Arch& openfpga_arch,
VprDeviceAnnotation& vpr_device_annotation,
const bool& verbose_output) {
size_t count = 0;
for (size_t iswitch = 0; iswitch < vpr_device_ctx.rr_switch_inf.size(); iswitch++) {
std::string switch_name(vpr_device_ctx.rr_switch_inf[iswitch].name);
/* Skip the delayless switch, which is only used by the edges between
* - SOURCE and OPIN
* - IPIN and SINK
*/
if (switch_name == std::string(VPR_DELAYLESS_SWITCH_NAME)) {
continue;
}
CircuitModelId circuit_model = CircuitModelId::INVALID();
/* The name-to-circuit mapping is stored in either cb_switch-to-circuit or sb_switch-to-circuit,
* Try to find one and update the device annotation
*/
if (0 < openfpga_arch.cb_switch2circuit.count(switch_name)) {
circuit_model = openfpga_arch.cb_switch2circuit.at(switch_name);
}
if (0 < openfpga_arch.sb_switch2circuit.count(switch_name)) {
if (CircuitModelId::INVALID() != circuit_model) {
VTR_LOG_WARN("Found a connection block and a switch block switch share the same name '%s' and binded to different circuit models '%s' and '%s'!\nWill use the switch block switch binding!\n",
switch_name.c_str(),
openfpga_arch.circuit_lib.model_name(circuit_model).c_str(),
openfpga_arch.circuit_lib.model_name(openfpga_arch.sb_switch2circuit.at(switch_name)).c_str());
}
circuit_model = openfpga_arch.sb_switch2circuit.at(switch_name);
}
/* Cannot find a circuit model, error out! */
if (CircuitModelId::INVALID() == circuit_model) {
VTR_LOG_ERROR("Fail to find a circuit model for a routing resource graph switch '%s'!\nPlease check your OpenFPGA architecture XML!\n",
switch_name.c_str());
exit(1);
}
/* Now update the device annotation */
vpr_device_annotation.add_rr_switch_circuit_model(RRSwitchId(iswitch), circuit_model);
VTR_LOGV(verbose_output,
"Binded a routing resource graph switch '%s' to circuit model '%s'\n",
switch_name.c_str(),
openfpga_arch.circuit_lib.model_name(circuit_model).c_str());
count++;
}
VTR_LOG("Binded %lu routing resource graph switches to circuit models\n",
count);
}
/********************************************************************
* Build the link between rr_graph switches and segments to their
* physical circuit models
*******************************************************************/
void annotate_rr_graph_circuit_models(const DeviceContext& vpr_device_ctx,
const Arch& openfpga_arch,
VprDeviceAnnotation& vpr_device_annotation,
const bool& verbose_output) {
/* Iterate over each rr_switch in the device context and bind with names */
annotate_rr_switch_circuit_models(vpr_device_ctx, openfpga_arch, vpr_device_annotation, verbose_output);
}
} /* end namespace openfpga */

9
openfpga/src/annotation/annotate_rr_gsb.h → openfpga/src/annotation/annotate_rr_graph.h
View File

@ -1,5 +1,5 @@
#ifndef ANNOTATE_RR_GSB_H
#define ANNOTATE_RR_GSB_H
#ifndef ANNOTATE_RR_GRAPH_H
#define ANNOTATE_RR_GRAPH_H
/********************************************************************
* Include header files that are required by function declaration
@ -19,6 +19,11 @@ void annotate_device_rr_gsb(const DeviceContext& vpr_device_ctx,
DeviceRRGSB& device_rr_gsb,
const bool& verbose_output);
void annotate_rr_graph_circuit_models(const DeviceContext& vpr_device_ctx,
const Arch& openfpga_arch,
VprDeviceAnnotation& vpr_device_annotation,
const bool& verbose_output);
} /* end namespace openfpga */
#endif

8
openfpga/src/base/openfpga_link_arch.cpp
View File

@ -12,7 +12,7 @@
#include "annotate_pb_types.h"
#include "annotate_pb_graph.h"
#include "annotate_routing.h"
#include "annotate_rr_gsb.h"
#include "annotate_rr_graph.h"
#include "openfpga_link_arch.h"
/* Include global variables of VPR */
@ -54,6 +54,12 @@ void link_arch(OpenfpgaContext& openfpga_context,
openfpga_context.mutable_vpr_device_annotation(),
cmd_context.option_enable(cmd, opt_verbose));
/* Annotate routing architecture to circuit library */
annotate_rr_graph_circuit_models(g_vpr_ctx.device(),
openfpga_context.arch(),
openfpga_context.mutable_vpr_device_annotation(),
cmd_context.option_enable(cmd, opt_verbose));
/* Annotate net mapping to each rr_node
*/
openfpga_context.mutable_vpr_routing_annotation().init(g_vpr_ctx.device().rr_graph);

1
openfpga/src/base/openfpga_setup_command.cpp
View File

@ -8,7 +8,6 @@
#include "openfpga_pb_pin_fixup.h"
#include "openfpga_lut_truth_table_fixup.h"
#include "check_netlist_naming_conflict.h"
#include "annotate_rr_gsb.h"
#include "compact_routing_hierarchy.h"
#include "openfpga_setup_command.h"