[lib] add pcf2place related data structure and required APIs
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a526dbee07
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@ -21,24 +21,16 @@ size_t IoLocationMap::io_index(const size_t& x,
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const size_t& y,
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const size_t& z,
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const std::string& io_port_name) const {
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if (x >= io_indices_.size()) {
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std::array<size_t, 3> coord = {x, y, z};
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auto result = io_indices_.find(coord);
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if (result == io_indices_.end()) {
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return size_t(-1);
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}
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if (result->second.get_name() != io_port_name) {
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return size_t(-1);
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}
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if (y >= io_indices_[x].size()) {
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return size_t(-1);
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}
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if (z >= io_indices_[x][y].size()) {
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return size_t(-1);
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}
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auto result = io_indices_[x][y][z].find(io_port_name);
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if (result == io_indices_[x][y][z].end()) {
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return size_t(-1);
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}
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return result->second;
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return result->second.get_lsb();
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}
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void IoLocationMap::set_io_index(const size_t& x,
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@ -46,19 +38,16 @@ void IoLocationMap::set_io_index(const size_t& x,
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const size_t& z,
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const std::string& io_port_name,
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const size_t& io_index) {
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if (x >= io_indices_.size()) {
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io_indices_.resize(x + 1);
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std::array<size_t, 3> coord = {x, y, z};
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auto result = io_indices_.find(coord);
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if (result != io_indices_.end()) {
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VTR_LOG_WARN("Overwrite io '%s[%lu]' coordinate (%lu, %lu, %lu) with '%s[%lu]'!\n",
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io_port_name.c_str(), io_index,
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x, y, z,
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result->second.get_name().c_str(), result->second.get_lsb());
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}
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if (y >= io_indices_[x].size()) {
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io_indices_[x].resize(y + 1);
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}
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if (z >= io_indices_[x][y].size()) {
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io_indices_[x][y].resize(z + 1);
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}
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io_indices_[x][y][z][io_port_name] = io_index;
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io_indices_[coord] = BasicPort(io_port_name, io_index, io_index);
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}
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int IoLocationMap::write_to_xml_file(const std::string& fname,
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@ -106,21 +95,15 @@ int IoLocationMap::write_to_xml_file(const std::string& fname,
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size_t io_cnt = 0;
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/* Walk through the fabric I/O location map data structure */
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for (size_t x = 0; x < io_indices_.size(); ++x) {
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for (size_t y = 0; y < io_indices_[x].size(); ++y) {
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for (size_t z = 0; z < io_indices_[x][y].size(); ++z) {
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for (const auto& name_id_pair : io_indices_[x][y][z]) {
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fp << "\t" << "<io pad=\"" << name_id_pair.first << "[" << name_id_pair.second << "]\"";
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fp << " " << "x=\"" << x << "\"";
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fp << " " << "y=\"" << y << "\"";
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fp << " " << "z=\"" << z << "\"";
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for (auto pair : io_indices_) {
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fp << "\t" << "<io pad=\"" << pair.second.get_name().c_str() << "[" << pair.second.get_lsb() << "]\"";
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fp << " " << "x=\"" << pair.first[0] << "\"";
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fp << " " << "y=\"" << pair.first[1] << "\"";
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fp << " " << "z=\"" << pair.first[2] << "\"";
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fp << "/>";
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fp << "\n";
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io_cnt++;
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}
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}
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}
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}
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/* Print an end to the file here */
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fp << "</io_coordinates>\n";
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@ -8,6 +8,7 @@
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#include <vector>
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#include <string>
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#include <map>
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#include "openfpga_port.h"
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/* Begin namespace openfpga */
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namespace openfpga {
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@ -34,6 +35,9 @@ class IoLocationMap {
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const size_t& y,
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const size_t& z,
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const std::string& io_port_name) const;
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size_t io_x(const BasicPort& io_port) const;
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size_t io_y(const BasicPort& io_port) const;
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size_t io_z(const BasicPort& io_port) const;
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public: /* Public mutators */
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void set_io_index(const size_t& x,
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const size_t& y,
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@ -46,7 +50,7 @@ class IoLocationMap {
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const bool& verbose) const;
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private: /* Internal Data */
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/* I/O index fast lookup by [x][y][z] location */
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std::vector<std::vector<std::vector<std::map<std::string, size_t>>>> io_indices_;
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std::map<std::array<size_t, 3>, BasicPort> io_indices_;
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};
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} /* End namespace openfpga*/
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@ -53,6 +53,17 @@ IoPinTable::e_io_direction IoPinTable::pin_direction(const IoPinTableId& pin_id)
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return pin_directions_[pin_id];
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}
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std::vector<IoPinTableId> IoPinTable::find_internal_pin(const BasicPort& ext_pin,
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const e_io_direction& pin_direction) const {
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std::vector<IoPinTableId> int_pin_ids;
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for (auto pin_id : pin_ids_) {
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if ((external_pins_[pin_id] == ext_pin) && (pin_directions_[pin_id] == pin_direction)) {
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int_pin_ids.push_back(pin_id);
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}
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}
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return int_pin_ids;
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}
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bool IoPinTable::empty() const {
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return 0 == pin_ids_.size();
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}
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@ -73,10 +73,13 @@ class IoPinTable {
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io_pin_table_range pins() const;
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public: /* Public Accessors: Basic data query */
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/* Get the basic information for a pin */
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openfpga::BasicPort internal_pin(const IoPinTableId& pin_id) const;
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openfpga::BasicPort external_pin(const IoPinTableId& pin_id) const;
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BasicPort internal_pin(const IoPinTableId& pin_id) const;
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BasicPort external_pin(const IoPinTableId& pin_id) const;
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e_side pin_side(const IoPinTableId& pin_id) const;
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e_io_direction pin_direction(const IoPinTableId& pin_id) const;
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/* Given an external pin, find all the internal pin that is mapped */
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std::vector<IoPinTableId> find_internal_pin(const BasicPort& ext_pin,
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const e_io_direction& pin_direction) const;
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/* Check if there are any pins */
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bool empty() const;
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public: /* Public Mutators */
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@ -23,7 +23,8 @@ namespace openfpga {
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* Return 1 if there are serious errors
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*******************************************************************/
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int pcf2place(const PcfData& pcf_data,
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const blifparse::BlifHeadReader& blif_head,
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const std::vector<std::string>& input_nets,
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const std::vector<std::string>& output_nets,
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const IoPinTable& io_pin_table,
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const IoLocationMap& io_location_map,
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IoNetPlace& io_net_place) {
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@ -35,10 +36,10 @@ int pcf2place(const PcfData& pcf_data,
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* - there are no duplicated pin assignment in pcf
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* - the pin direction in io_pin_table matches the pin type defined in blif
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*/
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if (!pcf_data.validate()) {
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VTR_LOG_ERROR("Invalid PCF data!\n");
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return 1;
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}
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//if (!pcf_data.validate()) {
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// VTR_LOG_ERROR("Invalid PCF data!\n");
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// return 1;
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//}
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/* Build the I/O place */
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for (const PcfIoConstraintId& io_id : pcf_data.io_constraints()) {
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@ -47,12 +48,10 @@ int pcf2place(const PcfData& pcf_data,
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/* Find the external pin name */
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BasicPort ext_pin = pcf_data.io_pin(io_id);
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/* Find the pin direction from blif reader */
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IoPinTable::e_io_direction pin_direction = NUM_IO_DIRECTIONS;
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std::vector<std::string> input_nets = blif_head.input_pins();
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std::vector<std::string> output_nets = blif_head.input_pins();
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if (input_pins.end() != std::find(input_nets.begin(), input_nets.end(), net)) {
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IoPinTable::e_io_direction pin_direction = IoPinTable::NUM_IO_DIRECTIONS;
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if (input_nets.end() != std::find(input_nets.begin(), input_nets.end(), net)) {
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pin_direction = IoPinTable::INPUT;
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} else if (output_pins.end() != std::find(output_nets.begin(), output_nets.end(), net)) {
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} else if (output_nets.end() != std::find(output_nets.begin(), output_nets.end(), net)) {
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pin_direction = IoPinTable::OUTPUT;
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} else {
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/* Cannot find the pin, error out! */
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@ -61,14 +60,16 @@ int pcf2place(const PcfData& pcf_data,
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num_err++;
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return 1;
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}
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/* Find the internal pin name from pin table */
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BasicPort int_pin = io_pin_table.find_internal_pin(ext_pin, pin_direction);
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/* Find the internal pin name from pin table, currently we only support 1-to-1 mapping */
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auto int_pin_ids = io_pin_table.find_internal_pin(ext_pin, pin_direction);
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VTR_ASSERT(1 == int_pin_ids.size());
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BasicPort int_pin = io_pin_table.internal_pin(int_pin_ids[0]);
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/* Find the coordinate from io location map */
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size_t x = io_location_map.io_x(int_pin);
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size_t y = io_location_map.io_y(int_pin);
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size_t z = io_location_map.io_z(int_pin);
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/* Add a fixed prefix to net namei, this is hard coded by VPR */
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if (OUTPUT == pin_direction) {
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if (IoPinTable::OUTPUT == pin_direction) {
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net = "out:" + net;
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}
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/* Add the information to I/O place data */
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@ -3,8 +3,9 @@
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/********************************************************************
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* Include header files required by the data structure definition
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*******************************************************************/
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#include <string>
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#include <vector>
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#include "pcf_data.h"
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#include "blif_head_reader.h"
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#include "io_pin_table.h"
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#include "io_location_map.h"
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#include "io_net_place.h"
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@ -14,12 +15,13 @@ namespace openfpga {
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/* Generate a .place file with the following input files
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* - A Pin Constraint File (.pcf)
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* - A netlist (.blif)
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* - Input and output lists from a netlist
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* - A chip I/O pin table file (.csv)
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* - An FPGA I/O location file (.xml)
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*/
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int pcf2place(const PcfData& pcf_data,
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const blifparse::BlifHeadReader& blif_head,
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const std::vector<std::string>& input_nets,
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const std::vector<std::string>& output_nets,
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const IoPinTable& io_pin_table,
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const IoLocationMap& io_location_map,
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IoNetPlace& io_net_place);
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