diff --git a/openfpga_flow/openfpga_yosys_techlib/k4_frac_N8_tileable_reset_softadder_register_scan_chain_dsp8_nonLR_caravel_io_skywater130nm_cell_sim.v b/openfpga_flow/openfpga_yosys_techlib/k4_frac_N8_tileable_reset_softadder_register_scan_chain_dsp8_nonLR_caravel_io_skywater130nm_cell_sim.v
new file mode 100644
index 000000000..1c9940188
--- /dev/null
+++ b/openfpga_flow/openfpga_yosys_techlib/k4_frac_N8_tileable_reset_softadder_register_scan_chain_dsp8_nonLR_caravel_io_skywater130nm_cell_sim.v
@@ -0,0 +1,12 @@
+//-----------------------------
+// 8-bit multiplier
+//-----------------------------
+module mult_8(
+  input [0:7] A,
+  input [0:7] B,
+  output [0:15] Y
+);
+
+assign Y = A * B;
+
+endmodule
diff --git a/openfpga_flow/openfpga_yosys_techlib/k4_frac_N8_tileable_reset_softadder_register_scan_chain_dsp8_nonLR_caravel_io_skywater130nm_dsp_map.v b/openfpga_flow/openfpga_yosys_techlib/k4_frac_N8_tileable_reset_softadder_register_scan_chain_dsp8_nonLR_caravel_io_skywater130nm_dsp_map.v
new file mode 100644
index 000000000..e492482f4
--- /dev/null
+++ b/openfpga_flow/openfpga_yosys_techlib/k4_frac_N8_tileable_reset_softadder_register_scan_chain_dsp8_nonLR_caravel_io_skywater130nm_dsp_map.v
@@ -0,0 +1,20 @@
+//-----------------------------
+// 8-bit multiplier
+//-----------------------------
+module mult_8x8 (
+  input [0:7] A,
+  input [0:7] B,
+  output [0:15] Y
+);
+  parameter A_SIGNED = 0;
+  parameter B_SIGNED = 0;
+  parameter A_WIDTH = 0;
+  parameter B_WIDTH = 0;
+  parameter Y_WIDTH = 0;
+
+  mult_8 #() _TECHMAP_REPLACE_ (
+    .A    (A),
+    .B    (B),
+    .Y    (Y) );
+
+endmodule