From a2c2b634e60673ae8c4f35763aea877c9da3895f Mon Sep 17 00:00:00 2001
From: bbleaptrot <35536624+bbleaptrot@users.noreply.github.com>
Date: Mon, 12 Apr 2021 14:00:54 -0600
Subject: [PATCH] Update link for _user_defined_template.v

This ensures it goes to the correct page after pull request 274 no longer works
---
 .../tutorials/arch_modeling/user_defined_temp_tutorial.rst      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/source/tutorials/arch_modeling/user_defined_temp_tutorial.rst b/docs/source/tutorials/arch_modeling/user_defined_temp_tutorial.rst
index 3f12839d4..cbc161971 100644
--- a/docs/source/tutorials/arch_modeling/user_defined_temp_tutorial.rst
+++ b/docs/source/tutorials/arch_modeling/user_defined_temp_tutorial.rst
@@ -167,4 +167,4 @@ Finally, rerun this command from the OpenFPGA root directory to ensure it is wor
    python3 openfpga_flow/scripts_run_fpga_task.py fpga_verilog/adder/hard_adder --debug --show_thread_logs
 
 
-.. _user_defined_template.v: https://openfpga--274.org.readthedocs.build/en/274/manual/fpga_verilog/fabric_netlist/#cmdoption-arg-user_defined_templates.v
+.. _user_defined_template.v: https://openfpga.readthedocs.io/en/master/manual/fpga_verilog/fabric_netlist/#cmdoption-arg-user_defined_templates.v