add profiling for read arch

libopenfpga/libarchopenfpga/src/check_circuit_library.cpp

@@ -6,10 +6,10 @@
  * 3. if nay circuit model miss mandatory ports 
  ***********************************************************************/
 
-/* Header files should be included in a sequence */
-/* Standard header files required go first */
+/* Headers from vtrutil library */
 #include "vtr_assert.h"
 #include "vtr_log.h"
+#include "vtr_time.h"
 
 #include "check_circuit_library.h"
 
@@ -437,7 +437,7 @@ size_t check_circuit_library_ports(const CircuitLibrary& circuit_lib) {
 void check_circuit_library(const CircuitLibrary& circuit_lib) {
   size_t num_err = 0;
 
-  VTR_LOG("Checking circuit models...\n");
+  vtr::ScopedStartFinishTimer timer("Check circuit library");
 
   /* 1. Circuit models have unique names  
    * For each circuit model, we always make sure it does not share any name with any circuit model locating after it

libopenfpga/libarchopenfpga/src/read_xml_openfpga_arch.cpp

@@ -9,6 +9,9 @@
 #include "pugixml.hpp"
 #include "pugixml_util.hpp"
 
+/* Headers from vtrutil library */
+#include "vtr_time.h"
+
 /* Headers from libarchfpga */
 #include "arch_error.h"
 #include "read_xml_util.h"
@@ -26,6 +29,8 @@
  * 1. circuit library
  *******************************************************************/
 openfpga::Arch read_xml_openfpga_arch(const char* arch_file_name) {
+  vtr::ScopedStartFinishTimer timer("Read OpenFPGA architecture");
+
   openfpga::Arch openfpga_arch;
 
   pugi::xml_node Next;