Merge pull request #430 from lnis-uofu/gg_ci_cd_dev
Updated yosys paths to copy in docker image
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commit
9f1d47b6c0
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@ -170,12 +170,8 @@ jobs:
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openfpga/openfpga
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vpr/libvpr.a
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vpr/vpr
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yosys/install/share/
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yosys/install/bin/yosys
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yosys/install/bin/yosys-abc
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yosys/install/bin/yosys-config
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yosys/install/bin/yosys-filterlib
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yosys/install/bin/yosys-smtbmc
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yosys/install/share
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yosys/install/bin
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openfpga_flow
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openfpga.sh
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docker_distribution:
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@ -13,9 +13,11 @@ Technical Details about FPGA-SPICE/Verilog/Bitstream/SDC:
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Dr. Xifan Tang
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xifan.tang@utah.edu
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xifan@osfpga.org
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.. Technical Details about layout auto-generation
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.. Edouard Giacomin
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.. edouard.giacomin@utah.edu
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Technical Details about physical design
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Ganesh Gore
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ganesh.gore@utah.edu
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