From 9dbf5363068808d03bdf894b582870265ec5103d Mon Sep 17 00:00:00 2001 From: tangxifan Date: Fri, 12 Jun 2020 11:16:53 -0600 Subject: [PATCH] add shuffled configurable children support for top module --- openfpga/src/base/openfpga_build_fabric.cpp | 2 ++ openfpga/src/fabric/build_device_module.cpp | 3 +- openfpga/src/fabric/build_device_module.h | 1 + openfpga/src/fabric/build_top_module.cpp | 8 ++++- openfpga/src/fabric/build_top_module.h | 3 +- .../src/fabric/build_top_module_memory.cpp | 35 +++++++++++++++++++ openfpga/src/fabric/build_top_module_memory.h | 3 ++ 7 files changed, 52 insertions(+), 3 deletions(-) diff --git a/openfpga/src/base/openfpga_build_fabric.cpp b/openfpga/src/base/openfpga_build_fabric.cpp index a5cb3125d..f5c007a09 100644 --- a/openfpga/src/base/openfpga_build_fabric.cpp +++ b/openfpga/src/base/openfpga_build_fabric.cpp @@ -66,6 +66,7 @@ int build_fabric(OpenfpgaContext& openfpga_ctx, CommandOptionId opt_compress_routing = cmd.option("compress_routing"); CommandOptionId opt_duplicate_grid_pin = cmd.option("duplicate_grid_pin"); + CommandOptionId opt_gen_random_fabric_key = cmd.option("generate_random_fabric_key"); CommandOptionId opt_write_fabric_key = cmd.option("write_fabric_key"); CommandOptionId opt_verbose = cmd.option("verbose"); @@ -83,6 +84,7 @@ int build_fabric(OpenfpgaContext& openfpga_ctx, g_vpr_ctx.device(), cmd_context.option_enable(cmd, opt_compress_routing), cmd_context.option_enable(cmd, opt_duplicate_grid_pin), + cmd_context.option_enable(cmd, opt_gen_random_fabric_key), cmd_context.option_enable(cmd, opt_verbose)); /* Output fabric key if user requested */ diff --git a/openfpga/src/fabric/build_device_module.cpp b/openfpga/src/fabric/build_device_module.cpp index 4b2375057..36769636a 100644 --- a/openfpga/src/fabric/build_device_module.cpp +++ b/openfpga/src/fabric/build_device_module.cpp @@ -32,6 +32,7 @@ ModuleManager build_device_module_graph(IoLocationMap& io_location_map, const DeviceContext& vpr_device_ctx, const bool& compress_routing, const bool& duplicate_grid_pin, + const bool& generate_random_fabric_key, const bool& verbose) { vtr::ScopedStartFinishTimer timer("Build fabric module graph"); @@ -116,7 +117,7 @@ ModuleManager build_device_module_graph(IoLocationMap& io_location_map, openfpga_ctx.arch().arch_direct, openfpga_ctx.arch().config_protocol.type(), sram_model, - compress_routing, duplicate_grid_pin); + compress_routing, duplicate_grid_pin, generate_random_fabric_key); /* Now a critical correction has to be done! * In the module construction, we always use prefix of ports because they are binded diff --git a/openfpga/src/fabric/build_device_module.h b/openfpga/src/fabric/build_device_module.h index 75a9f982c..7b8a6bd2b 100644 --- a/openfpga/src/fabric/build_device_module.h +++ b/openfpga/src/fabric/build_device_module.h @@ -20,6 +20,7 @@ ModuleManager build_device_module_graph(IoLocationMap& io_location_map, const DeviceContext& vpr_device_ctx, const bool& compress_routing, const bool& duplicate_grid_pin, + const bool& generate_random_fabric_key, const bool& verbose); } /* end namespace openfpga */ diff --git a/openfpga/src/fabric/build_top_module.cpp b/openfpga/src/fabric/build_top_module.cpp index 762ba66f0..a751834ef 100644 --- a/openfpga/src/fabric/build_top_module.cpp +++ b/openfpga/src/fabric/build_top_module.cpp @@ -321,7 +321,8 @@ void build_top_module(ModuleManager& module_manager, const e_config_protocol_type& sram_orgz_type, const CircuitModelId& sram_model, const bool& compact_routing_hierarchy, - const bool& duplicate_grid_pin) { + const bool& duplicate_grid_pin, + const bool& generate_random_fabric_key) { vtr::ScopedStartFinishTimer timer("Build FPGA fabric module"); @@ -369,6 +370,11 @@ void build_top_module(ModuleManager& module_manager, device_rr_gsb, sb_instance_ids, cb_instance_ids, compact_routing_hierarchy); + /* Shuffle the configurable children in a random sequence */ + if (true == generate_random_fabric_key) { + shuffle_top_module_configurable_children(module_manager, top_module); + } + /* Add shared SRAM ports from the sub-modules under this Verilog module * This is a much easier job after adding sub modules (instances), * we just need to find all the I/O ports from the child modules and build a list of it diff --git a/openfpga/src/fabric/build_top_module.h b/openfpga/src/fabric/build_top_module.h index d64de2755..fca3ea841 100644 --- a/openfpga/src/fabric/build_top_module.h +++ b/openfpga/src/fabric/build_top_module.h @@ -36,7 +36,8 @@ void build_top_module(ModuleManager& module_manager, const e_config_protocol_type& sram_orgz_type, const CircuitModelId& sram_model, const bool& compact_routing_hierarchy, - const bool& duplicate_grid_pin); + const bool& duplicate_grid_pin, + const bool& generate_random_fabric_key); } /* end namespace openfpga */ diff --git a/openfpga/src/fabric/build_top_module_memory.cpp b/openfpga/src/fabric/build_top_module_memory.cpp index 6466d98e5..2ac546218 100644 --- a/openfpga/src/fabric/build_top_module_memory.cpp +++ b/openfpga/src/fabric/build_top_module_memory.cpp @@ -366,6 +366,41 @@ void organize_top_module_memory_modules(ModuleManager& module_manager, } } + +/******************************************************************** + * Shuffle the configurable children in a random sequence + * + * TODO: May use a more customized shuffle mechanism + * + * Note: + * - This function should NOT be called + * before allocating any configurable child + ********************************************************************/ +void shuffle_top_module_configurable_children(ModuleManager& module_manager, + const ModuleId& top_module) { + size_t num_keys = module_manager.configurable_children(top_module).size(); + std::vector shuffled_keys; + shuffled_keys.reserve(num_keys); + for (size_t ikey = 0; ikey < num_keys; ++ikey) { + shuffled_keys.push_back(ikey); + } + + std::random_shuffle(shuffled_keys.begin(), shuffled_keys.end()); + + /* Cache the configurable children and their instances */ + std::vector orig_configurable_children = module_manager.configurable_children(top_module); + std::vector orig_configurable_child_instances = module_manager.configurable_child_instances(top_module); + + /* Reorganize the configurable children */ + module_manager.clear_configurable_children(top_module); + + for (size_t ikey = 0; ikey < num_keys; ++ikey) { + module_manager.add_configurable_child(top_module, + orig_configurable_children[shuffled_keys[ikey]], + orig_configurable_child_instances[shuffled_keys[ikey]]); + } +} + /******************************************************************** * Add a list of ports that are used for SRAM configuration to the FPGA * top-level module diff --git a/openfpga/src/fabric/build_top_module_memory.h b/openfpga/src/fabric/build_top_module_memory.h index b67389790..1c6dd56e5 100644 --- a/openfpga/src/fabric/build_top_module_memory.h +++ b/openfpga/src/fabric/build_top_module_memory.h @@ -34,6 +34,9 @@ void organize_top_module_memory_modules(ModuleManager& module_manager, const std::map>& cb_instance_ids, const bool& compact_routing_hierarchy); +void shuffle_top_module_configurable_children(ModuleManager& module_manager, + const ModuleId& top_module); + void add_top_module_sram_ports(ModuleManager& module_manager, const ModuleId& module_id, const CircuitLibrary& circuit_lib,