diff --git a/examples/example_1.sh b/examples/example_1.sh
index 0a3d284e5..924e3057f 100755
--- a/examples/example_1.sh
+++ b/examples/example_1.sh
@@ -1,6 +1,10 @@
#!/bin/sh
# Example of how to run vpr
+# The paths need to be absolute hence we modify a keyword with PWD
+
+sed "s:OPENFPGAPATH:${PWD}/..:g" example_1_template.xml > example_1.xml
+
# Pack, place, and route a heterogeneous FPGA
# Packing uses the AAPack algorithm
../vpr7_x2p/vpr/vpr ./example_1.xml ./example_1.blif --full_stats --nodisp --route_chan_width 30 --fpga_spice --fpga_spice_rename_illegal_port --fpga_spice_dir ./spice_test_example_1 --fpga_spice_print_top_testbench --fpga_spice_print_grid_testbench --fpga_spice_print_cb_testbench --fpga_spice_print_sb_testbench --fpga_spice_print_lut_testbench --fpga_spice_print_hardlogic_testbench --fpga_spice_print_pb_mux_testbench --fpga_spice_print_cb_mux_testbench --fpga_spice_print_sb_mux_testbench --fpga_verilog --fpga_verilog_dir ./verilog_test_example_1
diff --git a/examples/example_1.xml b/examples/example_1.xml
index 79c3c940f..17b2b5884 100644
--- a/examples/example_1.xml
+++ b/examples/example_1.xml
@@ -57,7 +57,7 @@
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diff --git a/examples/example_1_template.xml b/examples/example_1_template.xml
new file mode 100644
index 000000000..c6b3a395e
--- /dev/null
+++ b/examples/example_1_template.xml
@@ -0,0 +1,403 @@
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+ 1 1 1 1 1
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+ 1 1
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+ io.outpad io.inpad
+ io.outpad io.inpad
+ io.outpad io.inpad
+ io.outpad io.inpad
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diff --git a/examples/example_2.sh b/examples/example_2.sh
index 74041f62e..f884a5081 100755
--- a/examples/example_2.sh
+++ b/examples/example_2.sh
@@ -1,6 +1,11 @@
#!/bin/sh
# Example of how to run vpr
+
+# The paths need to be absolute hence we modify a keyword with PWD
+
+sed "s:OPENFPGAPATH:${PWD}/..:g" example_2_template.xml > example_2.xml
+
# Pack, place, and route a heterogeneous FPGA
# Packing uses the AAPack algorithm
../vpr7_x2p/vpr/vpr ./example_2.xml ./example_2.blif --full_stats --nodisp --route_chan_width 100 --fpga_spice --fpga_spice_rename_illegal_port --fpga_spice_dir ./spice_test_example_2 --fpga_spice_print_top_testbench --fpga_spice_print_grid_testbench --fpga_spice_print_cb_testbench --fpga_spice_print_sb_testbench --fpga_spice_print_lut_testbench --fpga_spice_print_hardlogic_testbench --fpga_spice_print_pb_mux_testbench --fpga_spice_print_cb_mux_testbench --fpga_spice_print_sb_mux_testbench --fpga_verilog --fpga_verilog_dir ./verilog_test_example_2
diff --git a/examples/example_2.xml b/examples/example_2.xml
index 846f9dc4c..982787f0f 100644
--- a/examples/example_2.xml
+++ b/examples/example_2.xml
@@ -56,7 +56,7 @@
-
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@@ -135,7 +135,7 @@
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@@ -156,7 +156,7 @@
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diff --git a/examples/example_2_template.xml b/examples/example_2_template.xml
new file mode 100644
index 000000000..07de6be07
--- /dev/null
+++ b/examples/example_2_template.xml
@@ -0,0 +1,397 @@
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+ io.outpad io.inpad
+ io.outpad io.inpad
+ io.outpad io.inpad
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