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preload functions

This commit is contained in:
Lin 2024-08-07 03:20:45 -07:00
parent 72a90a4d8f
commit 9c67950a75
4 changed files with 154 additions and 93 deletions
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95
openfpga/src/annotation/device_rr_gsb.cpp
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@ -562,58 +562,63 @@ size_t DeviceRRGSB::get_cb_unique_module_index(
return cb_unique_module_id; return cb_unique_module_id;
} }
void DeviceRRGSB::preload_unique_cbx_module(int x, int y) {} void DeviceRRGSB::preload_unique_cb_module(
const vtr::Point<size_t> block_coordinate,
void DeviceRRGSB::preload_unique_cby_module(int x, int y) {} const std::vector<vtr::Point<size_t>> instance_coords,
const t_rr_type& cb_type) {
void DeviceRRGSB::preload_unique_sb_module(int ix, int iy) { /* Add to list if this is a unique mirror*/
vtr::Point<size_t> sb_coordinate(ix, iy); size_t limit_x;
bool is_unique_module = true; size_t limit_y;
switch(cb_type){
for (size_t id = 0; id < get_num_sb_unique_module(); ++id) { case CHANX:
/* Check whether the input module exists.*/ limit_x = cby_unique_module_id_.size();
if (sb_unique_module_[id].x() == ix && sb_unique_module_[id].y() == iy) { limit_y = cby_unique_module_id_[0].size();
is_unique_module = false;
sb_unique_module_id_[ix][iy] = id;
break; break;
} case CHANY:
limit_x = cby_unique_module_id_.size();
limit_y = cby_unique_module_id_[0].size();
break;
default:
VTR_LOG_ERROR("Invalid type");
} }
if (true == is_unique_module) {
sb_unique_module_.push_back(sb_coordinate); VTR_ASSERT(block_coordinate.x() < limit_x);
VTR_ASSERT(block_coordinate.y() < limit_y);
add_cb_unique_module(cb_type, block_coordinate);
/* Record the id of unique mirror */
set_cb_unique_module_id(cb_type, block_coordinate,
get_num_cb_unique_module(cb_type) - 1);
/* Traverse the unique_mirror list and set up its module id */
for (auto instance_location : instance_coords) {
/* Record the id of unique mirror */ /* Record the id of unique mirror */
sb_unique_module_id_[ix][iy] = sb_unique_module_.size() - 1; VTR_ASSERT(instance_location.x() < limit_x);
VTR_ASSERT(instance_location.y() < limit_y);
set_cb_unique_module_id(
cb_type, instance_location,
cbx_unique_module_id_[block_coordinate.x()][block_coordinate.y()]);
} }
} }
/* need to preload after cb and sb are preloaded */ void DeviceRRGSB::preload_unique_sb_module(
void DeviceRRGSB::preload_unique_gsb_module(int ix, int iy) { const vtr::Point<size_t> block_coordinate,
// vtr::Point<size_t> gsb_coordinate(ix, iy); const std::vector<vtr::Point<size_t>> instance_coords) {
// bool is_unique_module = true; /*input block coordinate should be within gsb coord range*/
VTR_ASSERT(block_coordinate.x() < sb_unique_module_id_.size());
VTR_ASSERT(block_coordinate.y() < sb_unique_module_id_[0].size());
sb_unique_module_.push_back(block_coordinate);
/* Record the id of unique module */
sb_unique_module_id_[block_coordinate.x()][block_coordinate.y()] =
sb_unique_module_.size() - 1;
// for (size_t id = 0; id < get_num_gsb_unique_module(); ++id) { /* each mirror instance of the unique module will have the same module id as
// const vtr::Point<size_t>& gsb_unique_module_coordinate = * the unique module */
// gsb_unique_module_[id]; for (auto instance_location : instance_coords) {
// if ((sb_unique_module_id_[ix][iy] == VTR_ASSERT(instance_location.x() < sb_unique_module_id_.size());
// sb_unique_module_id_[gsb_unique_module_coordinate.x()] VTR_ASSERT(instance_location.y() < sb_unique_module_id_[0].size());
// [gsb_unique_module_coordinate.y()]) && sb_unique_module_id_[instance_location.x()][instance_location.y()] =
// (cbx_unique_module_id_[ix][iy] == sb_unique_module_id_[block_coordinate.x()][block_coordinate.y()];
// cbx_unique_module_id_[gsb_unique_module_coordinate.x()] }
// [gsb_unique_module_coordinate.y()]) &&
// (cby_unique_module_id_[ix][iy] ==
// cby_unique_module_id_[gsb_unique_module_coordinate.x()]
// [gsb_unique_module_coordinate.y()])) {
// /* This is a mirror, raise the flag and we finish */
// is_unique_module = false;
// /* Record the id of unique mirror */
// gsb_unique_module_id_[ix][iy] = id;
// break;
// }
// }
// if (true == is_unique_module) {
// add_gsb_unique_module(gsb_coordinate);
// /* Record the id of unique mirror */
// gsb_unique_module_id_[ix][iy] = get_num_gsb_unique_module() - 1;
// }
} }
} /* End namespace openfpga*/ } /* End namespace openfpga*/

16
openfpga/src/annotation/device_rr_gsb.h
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@ -95,12 +95,16 @@ class DeviceRRGSB {
automatically identify and update the lists automatically identify and update the lists
of unique mirrors and rotatable mirrors */ of unique mirrors and rotatable mirrors */
void clear(); /* clean the content */ void clear(); /* clean the content */
void preload_unique_cbx_module(int x, int y); void preload_unique_cb_module(
void preload_unique_cby_module(int x, int y); const vtr::Point<size_t> block_coordinate,
void preload_unique_sb_module(int x, int y); const std::vector<vtr::Point<size_t>> instance_coords,
void preload_unique_gsb_module(int x, int y); const t_rr_type& cb_type);
private: /* Internal cleaners */ void preload_unique_sb_module(
void clear_gsb(); /* clean the content */ const vtr::Point<size_t> block_coordinate,
const std::vector<vtr::Point<size_t>> instance_coords);
private: /* Internal cleaners */
void clear_gsb(); /* clean the content */
void clear_cb_unique_module(const t_rr_type& cb_type); /* clean the content */ void clear_cb_unique_module(const t_rr_type& cb_type); /* clean the content */
void clear_cb_unique_module_id( void clear_cb_unique_module_id(
const t_rr_type& cb_type); /* clean the content */ const t_rr_type& cb_type); /* clean the content */

16
openfpga/src/base/openfpga_build_fabric_template.h
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@ -20,12 +20,12 @@
#include "read_xml_io_name_map.h" #include "read_xml_io_name_map.h"
#include "read_xml_module_name_map.h" #include "read_xml_module_name_map.h"
#include "read_xml_tile_config.h" #include "read_xml_tile_config.h"
#include "read_xml_unique_blocks.h"
#include "rename_modules.h" #include "rename_modules.h"
#include "vtr_log.h" #include "vtr_log.h"
#include "vtr_time.h" #include "vtr_time.h"
#include "write_xml_fabric_pin_physical_location.h" #include "write_xml_fabric_pin_physical_location.h"
#include "write_xml_module_name_map.h" #include "write_xml_module_name_map.h"
#include "read_xml_unique_blocks.h"
/* begin namespace openfpga */ /* begin namespace openfpga */
namespace openfpga { namespace openfpga {
@ -490,8 +490,13 @@ int read_unique_blocks_template(T& openfpga_ctx, const Command& cmd,
std::string file_name = cmd_context.option_value(cmd, opt_file); std::string file_name = cmd_context.option_value(cmd, opt_file);
std::string file_type = cmd_context.option_value(cmd, opt_type); std::string file_type = cmd_context.option_value(cmd, opt_type);
/* Write hierarchy to a file */ /* Write hierarchy to a file */
return read_xml_unique_blocks(openfpga_ctx, file_name.c_str(), file_type.c_str(), if (file_type == "xml") {
cmd_context.option_enable(cmd, opt_verbose)); return read_xml_unique_blocks(openfpga_ctx, file_name.c_str(),
file_type.c_str(),
cmd_context.option_enable(cmd, opt_verbose));
} else {
VTR_LOG_ERROR("file type %s not supported", file_type);
}
} }
template <class T> template <class T>
@ -512,8 +517,9 @@ int write_unique_blocks_template(T& openfpga_ctx, const Command& cmd,
std::string file_type = cmd_context.option_value(cmd, opt_type); std::string file_type = cmd_context.option_value(cmd, opt_type);
/* Write hierarchy to a file */ /* Write hierarchy to a file */
return read_xml_unique_blocks(openfpga_ctx, file_name.c_str(), file_type.c_str(), return read_xml_unique_blocks(openfpga_ctx, file_name.c_str(),
cmd_context.option_enable(cmd, opt_verbose)); file_type.c_str(),
cmd_context.option_enable(cmd, opt_verbose));
} }
} /* end namespace openfpga */ } /* end namespace openfpga */

120
openfpga/src/fabric/read_xml_unique_blocks.h
View File

@ -23,61 +23,92 @@
/* Headers from libarchfpga */ /* Headers from libarchfpga */
#include "arch_error.h" #include "arch_error.h"
#include "device_rr_gsb_utils.h"
#include "read_xml_unique_blocks.h" #include "read_xml_unique_blocks.h"
#include "read_xml_util.h" #include "read_xml_util.h"
#include "rr_gsb.h" #include "rr_gsb.h"
/********************************************************************
* Function declaration
*******************************************************************/
template <class T>
int read_xml_unique_blocks(T& openfpga_ctx, const char* file_name,
const char* file_type, bool verbose);
/******************************************************************** /********************************************************************
* Parse XML codes of a <instance> to an object of unique_blocks * Parse XML codes of a <instance> to an object of unique_blocks
*******************************************************************/ *******************************************************************/
template <class T> vtr::Point<size_t> read_xml_unique_instance_info(
void read_xml_unique_instance_info(T& device_rr_gsb, pugi::xml_node& xml_instance_info, const pugiutil::loc_data& loc_data) {
pugi::xml_node& xml_instance_info,
const pugiutil::loc_data& loc_data,
std::string type) {
int instance_x = get_attribute(xml_instance_info, "x", loc_data).as_int(); int instance_x = get_attribute(xml_instance_info, "x", loc_data).as_int();
int instance_y = get_attribute(xml_instance_info, "y", loc_data).as_int(); int instance_y = get_attribute(xml_instance_info, "y", loc_data).as_int();
if (type == "sb") { vtr::Point<size_t> instance_coordinate(instance_x, instance_y);
device_rr_gsb.preload_unique_sb_module(instance_x, instance_y); return instance_coordinate;
} else if (type == "cb") {
// read_cb_unique_blocks();
std::cout << "By pass here" << std::endl;
} else if (type == "gsb") {
/* should grab coordinates first and then by pass it to preload gsb*/
std::cout << "By pass here" << std::endl;
// read_gsb_unique_blocks();
}
} }
template <class T>
void report_unique_module_status(T& openfpga_ctx, bool verbose_output) {
/* Report the stats */
VTR_LOGV(
verbose_output,
"Detected %lu unique X-direction connection blocks from a total of %d "
"(compression rate=%.2f%)\n",
openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANX),
find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(), CHANX),
100. *
((float)find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(),
CHANX) /
(float)openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANX) -
1.));
VTR_LOGV(
verbose_output,
"Detected %lu unique Y-direction connection blocks from a total of %d "
"(compression rate=%.2f%)\n",
openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANY),
find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(), CHANY),
100. *
((float)find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(),
CHANY) /
(float)openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANY) -
1.));
VTR_LOGV(
verbose_output,
"Detected %lu unique switch blocks from a total of %d (compression "
"rate=%.2f%)\n",
openfpga_ctx.device_rr_gsb().get_num_sb_unique_module(),
find_device_rr_gsb_num_sb_modules(openfpga_ctx.device_rr_gsb(),
g_vpr_ctx.device().rr_graph),
100. * ((float)find_device_rr_gsb_num_sb_modules(
openfpga_ctx.device_rr_gsb(), g_vpr_ctx.device().rr_graph) /
(float)openfpga_ctx.device_rr_gsb().get_num_sb_unique_module() -
1.));
VTR_LOG(
"Detected %lu unique general switch blocks from a total of %d "
"(compression "
"rate=%.2f%)\n",
openfpga_ctx.device_rr_gsb().get_num_gsb_unique_module(),
find_device_rr_gsb_num_gsb_modules(openfpga_ctx.device_rr_gsb(),
g_vpr_ctx.device().rr_graph),
100. * ((float)find_device_rr_gsb_num_gsb_modules(
openfpga_ctx.device_rr_gsb(), g_vpr_ctx.device().rr_graph) /
(float)openfpga_ctx.device_rr_gsb().get_num_gsb_unique_module() -
1.));
}
/******************************************************************** /********************************************************************
* Parse XML codes about <repack_design_constraints> to an object of * Parse XML codes about <repack_design_constraints> to an object of
*RepackDesignConstraints *RepackDesignConstraints
*******************************************************************/ *******************************************************************/
template <class T> template <class T>
int read_xml_unique_blocks(T& openfpga_ctx, const char* file_name, int read_xml_unique_blocks(T& openfpga_ctx, const char* file_name,
const char* file_type, bool verbose) { const char* file_type, bool verbose_output) {
vtr::ScopedStartFinishTimer timer("Read unique blocks xml file"); vtr::ScopedStartFinishTimer timer("Read unique blocks xml file");
// RepackDesignConstraints repack_design_constraints;
/* Parse the file */ /* Parse the file */
pugi::xml_document doc; pugi::xml_document doc;
pugiutil::loc_data loc_data; pugiutil::loc_data loc_data;
VTR_ASSERT(strcmp(file_type, "xml") == 0);
try { try {
loc_data = pugiutil::load_xml(doc, file_name); loc_data = pugiutil::load_xml(doc, file_name);
pugi::xml_node xml_root = get_single_child(doc, "unique_blocks", loc_data); pugi::xml_node xml_root = get_single_child(doc, "unique_blocks", loc_data);
/* get device_rr_gsb data type and initialize it*/ /* get device_rr_gsb data type and initialize it*/
auto device_rr_gsb = openfpga_ctx.mutable_device_rr_gsb(); openfpga::DeviceRRGSB& device_rr_gsb = openfpga_ctx.mutable_device_rr_gsb();
device_rr_gsb.clear(); device_rr_gsb.clear();
/* load unique blocks xml file and set up device_rr_gdb */ /* load unique blocks xml file and set up device_rr_gdb */
@ -86,23 +117,38 @@ int read_xml_unique_blocks(T& openfpga_ctx, const char* file_name,
if (xml_block_info.name() == std::string("block")) { if (xml_block_info.name() == std::string("block")) {
std::string type = std::string type =
get_attribute(xml_block_info, "type", loc_data).as_string(); get_attribute(xml_block_info, "type", loc_data).as_string();
std::string block_x = int block_x = get_attribute(xml_block_info, "x", loc_data).as_int();
get_attribute(xml_block_info, "x", loc_data).as_string(); int block_y = get_attribute(xml_block_info, "y", loc_data).as_int();
std::string block_y = vtr::Point<size_t> block_coordinate(block_x, block_y);
get_attribute(xml_block_info, "y", loc_data).as_string(); std::vector<vtr::Point<size_t>> instance_coords;
for (pugi::xml_node xml_instance_info : xml_block_info.children()) { for (pugi::xml_node xml_instance_info : xml_block_info.children()) {
if (xml_instance_info.name() == std::string("instance")) { if (xml_instance_info.name() == std::string("instance")) {
read_xml_unique_instance_info(device_rr_gsb, xml_instance_info, auto instance_coordinate =
loc_data, type); read_xml_unique_instance_info(xml_instance_info, loc_data);
instance_coords.push_back(instance_coordinate);
} }
// read_xml_unique_instance_info(xml_instance_info, loc_data); }
/* get block coordinate and instance coordinate, try to setup device rr
* gsb */
if (type == "sb") {
device_rr_gsb.preload_unique_sb_module(block_coordinate,
instance_coords);
} else if (type == "cby") {
device_rr_gsb.preload_unique_cb_module(block_coordinate,
instance_coords, CHANY);
} else if (type == "cbx") {
device_rr_gsb.preload_unique_cb_module(block_coordinate,
instance_coords, CHANX);
} else {
VTR_LOG_ERROR("Unexpected type!");
} }
} else { } else {
bad_tag(xml_block_info, loc_data, xml_root, {"block"}); bad_tag(xml_block_info, loc_data, xml_root, {"block"});
return 1; return 1;
} }
// std::cout << "what is the root name: " << xml_block_info.name() << }
// std::endl; if (verbose_output) {
report_unique_module_status(openfpga_ctx, true);
} }
} catch (pugiutil::XmlError& e) { } catch (pugiutil::XmlError& e) {
archfpga_throw(file_name, e.line(), "%s", e.what()); archfpga_throw(file_name, e.line(), "%s", e.what());