diff --git a/libs/libclkarchopenfpga/src/base/clock_network.cpp b/libs/libclkarchopenfpga/src/base/clock_network.cpp index cfdfed633..a1dcca476 100644 --- a/libs/libclkarchopenfpga/src/base/clock_network.cpp +++ b/libs/libclkarchopenfpga/src/base/clock_network.cpp @@ -82,8 +82,8 @@ std::vector ClockNetwork::pins( ***********************************************************************/ t_rr_type ClockNetwork::spine_track_type(const ClockSpineId& spine_id) const { VTR_ASSERT(valid_spine_start_end_points(spine_id)); - if ((spine_start_point(spine_id).x() == spine_end_point(spine_id).x()) - && (spine_start_point(spine_id).y() == spine_end_point(spine_id).y())) { + if ((spine_start_point(spine_id).x() == spine_end_point(spine_id).x()) && + (spine_start_point(spine_id).y() == spine_end_point(spine_id).y())) { return spine_track_types_[spine_id]; } else if (spine_start_point(spine_id).y() == spine_end_point(spine_id).y()) { return CHANX; @@ -96,14 +96,16 @@ Direction ClockNetwork::spine_direction(const ClockSpineId& spine_id) const { if (spine_track_type(spine_id) == CHANX) { if (spine_start_point(spine_id).x() == spine_end_point(spine_id).x()) { return spine_directions_[spine_id]; - } else if (spine_start_point(spine_id).x() < spine_end_point(spine_id).x()) { + } else if (spine_start_point(spine_id).x() < + spine_end_point(spine_id).x()) { return Direction::INC; } } else { VTR_ASSERT(spine_track_type(spine_id) == CHANY); if (spine_start_point(spine_id).y() == spine_end_point(spine_id).y()) { return spine_directions_[spine_id]; - } else if (spine_start_point(spine_id).y() < spine_end_point(spine_id).y()) { + } else if (spine_start_point(spine_id).y() < + spine_end_point(spine_id).y()) { return Direction::INC; } } @@ -507,7 +509,6 @@ void ClockNetwork::set_spine_track_type(const ClockSpineId& spine_id, spine_track_types_[spine_id] = type; } - void ClockNetwork::add_spine_switch_point(const ClockSpineId& spine_id, const ClockSpineId& drive_spine_id, const vtr::Point& coord) { @@ -569,14 +570,20 @@ bool ClockNetwork::validate_tree() const { /* Ensure valid track types */ if (spine_track_type(spine_id) != spine_track_types_[spine_id]) { VTR_LOG_ERROR( - "Spine '%s' has a mismatch between inferred track type '%s' against user-defined track type '%s'\n", - spine_name(spine_id).c_str(), rr_node_typename[spine_track_type(spine_id)], rr_node_typename[spine_track_types_[spine_id]]); + "Spine '%s' has a mismatch between inferred track type '%s' against " + "user-defined track type '%s'\n", + spine_name(spine_id).c_str(), + rr_node_typename[spine_track_type(spine_id)], + rr_node_typename[spine_track_types_[spine_id]]); return false; } if (spine_direction(spine_id) != spine_directions_[spine_id]) { VTR_LOG_ERROR( - "Spine '%s' has a mismatch between inferred direction '%s' against user-defined direction '%s'\n", - spine_name(spine_id).c_str(), DIRECTION_STRING[size_t(spine_direction(spine_id))], DIRECTION_STRING[size_t(spine_directions_[spine_id])]); + "Spine '%s' has a mismatch between inferred direction '%s' against " + "user-defined direction '%s'\n", + spine_name(spine_id).c_str(), + DIRECTION_STRING[size_t(spine_direction(spine_id))], + DIRECTION_STRING[size_t(spine_directions_[spine_id])]); return false; } /* parent spine and child spine should be in different track type */ @@ -667,7 +674,6 @@ bool ClockNetwork::update_spine_attributes(const ClockTreeId& tree_id) { return true; } - /************************************************************************ * Internal invalidators/validators ***********************************************************************/ @@ -717,7 +723,7 @@ bool ClockNetwork::valid_spine_start_end_points( bool ClockNetwork::is_vague_coordinate(const ClockSpineId& spine_id) const { return ((spine_start_point(spine_id).x() == spine_end_point(spine_id).x()) && - (spine_start_point(spine_id).y() == spine_end_point(spine_id).y())); + (spine_start_point(spine_id).y() == spine_end_point(spine_id).y())); } } // End of namespace openfpga diff --git a/libs/libclkarchopenfpga/src/base/clock_network.h b/libs/libclkarchopenfpga/src/base/clock_network.h index 34ee8bf3c..e729dbef2 100644 --- a/libs/libclkarchopenfpga/src/base/clock_network.h +++ b/libs/libclkarchopenfpga/src/base/clock_network.h @@ -163,8 +163,7 @@ class ClockNetwork { const vtr::Point& coord); void set_spine_end_point(const ClockSpineId& spine_id, const vtr::Point& coord); - void set_spine_direction(const ClockSpineId& spine_id, - const Direction& dir); + void set_spine_direction(const ClockSpineId& spine_id, const Direction& dir); void set_spine_track_type(const ClockSpineId& spine_id, const t_rr_type& type); void add_spine_switch_point(const ClockSpineId& spine_id, @@ -195,8 +194,9 @@ class ClockNetwork { * X-direction spine or a Y-direction spine. Diagonal spine is not supported! */ bool valid_spine_start_end_points(const ClockSpineId& spine_id) const; - /* Definition of a vague coordinate is that start_x == end_x && start_y == end_y - * In such situation, we need specific track type and direction to be provided by user + /* Definition of a vague coordinate is that start_x == end_x && start_y == + * end_y In such situation, we need specific track type and direction to be + * provided by user */ bool is_vague_coordinate(const ClockSpineId& spine_id) const; /* Validate the internal data. Required to ensure clean data before usage. If diff --git a/libs/libclkarchopenfpga/src/io/read_xml_clock_network.cpp b/libs/libclkarchopenfpga/src/io/read_xml_clock_network.cpp index f5fd17abe..ed083f483 100644 --- a/libs/libclkarchopenfpga/src/io/read_xml_clock_network.cpp +++ b/libs/libclkarchopenfpga/src/io/read_xml_clock_network.cpp @@ -97,8 +97,7 @@ static void read_xml_clock_spine_switch_point( /******************************************************************** * Convert string to the enumerate of model type *******************************************************************/ -static t_rr_type string_to_track_type( - const std::string& type_string) { +static t_rr_type string_to_track_type(const std::string& type_string) { for (size_t itype = 0; itype < NUM_RR_TYPES; ++itype) { if (std::string(rr_node_typename[itype]) == type_string) { return static_cast(itype); @@ -112,8 +111,7 @@ static t_rr_type string_to_track_type( /******************************************************************** * Convert string to the enumerate of model type *******************************************************************/ -static Direction string_to_direction( - const std::string& type_string) { +static Direction string_to_direction(const std::string& type_string) { for (size_t itype = 0; itype < size_t(Direction::NUM_DIRECTIONS); ++itype) { if (std::string(DIRECTION_STRING[itype]) == type_string) { return static_cast(itype); @@ -124,7 +122,6 @@ static Direction string_to_direction( return Direction::NUM_DIRECTIONS; } - /******************************************************************** * Parse XML codes of a to an object of ClockNetwork *******************************************************************/ @@ -177,17 +174,20 @@ static void read_xml_clock_spine(pugi::xml_node& xml_spine, t_rr_type track_type = string_to_track_type(track_type_name); if (CHANX != track_type && CHANY != track_type) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(xml_spine), - "Invalid track type! Expect '%s' or '%s'!\n", rr_node_typename[CHANX], rr_node_typename[CHANY]); + "Invalid track type! Expect '%s' or '%s'!\n", + rr_node_typename[CHANX], rr_node_typename[CHANY]); } clk_ntwk.set_spine_track_type(spine_id, track_type); - + std::string direction_name = get_attribute(xml_spine, XML_CLOCK_SPINE_ATTRIBUTE_DIRECTION, loc_data) .as_string(); Direction direction_type = string_to_direction(direction_name); if (Direction::INC != direction_type && Direction::DEC != direction_type) { archfpga_throw(loc_data.filename_c_str(), loc_data.line(xml_spine), - "Invalid direction type! Expect '%s' or '%s'!\n", DIRECTION_STRING[size_t(Direction::INC)], DIRECTION_STRING[size_t(Direction::DEC)]); + "Invalid direction type! Expect '%s' or '%s'!\n", + DIRECTION_STRING[size_t(Direction::INC)], + DIRECTION_STRING[size_t(Direction::DEC)]); } clk_ntwk.set_spine_direction(spine_id, direction_type); } diff --git a/libs/libclkarchopenfpga/src/io/write_xml_clock_network.cpp b/libs/libclkarchopenfpga/src/io/write_xml_clock_network.cpp index 4fb6991cf..720335aa4 100644 --- a/libs/libclkarchopenfpga/src/io/write_xml_clock_network.cpp +++ b/libs/libclkarchopenfpga/src/io/write_xml_clock_network.cpp @@ -80,8 +80,11 @@ static int write_xml_clock_spine(std::fstream& fp, const ClockNetwork& clk_ntwk, write_xml_attribute(fp, XML_CLOCK_SPINE_ATTRIBUTE_END_X, end_coord.x()); write_xml_attribute(fp, XML_CLOCK_SPINE_ATTRIBUTE_END_Y, end_coord.y()); if (clk_ntwk.is_vague_coordinate(spine_id)) { - write_xml_attribute(fp, XML_CLOCK_SPINE_ATTRIBUTE_TYPE, rr_node_typename[clk_ntwk.spine_track_type(spine_id)]); - write_xml_attribute(fp, XML_CLOCK_SPINE_ATTRIBUTE_DIRECTION, DIRECTION_STRING[size_t(clk_ntwk.spine_direction(spine_id))]); + write_xml_attribute(fp, XML_CLOCK_SPINE_ATTRIBUTE_TYPE, + rr_node_typename[clk_ntwk.spine_track_type(spine_id)]); + write_xml_attribute( + fp, XML_CLOCK_SPINE_ATTRIBUTE_DIRECTION, + DIRECTION_STRING[size_t(clk_ntwk.spine_direction(spine_id))]); } fp << ">"