From 98b1917455d19612ab93b45f922311616306a4a0 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Tue, 16 Aug 2022 15:18:11 -0700 Subject: [PATCH] [script] fixed CMake errors --- CMakeLists.txt | 2 +- vtr-verilog-to-routing | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index b3f5679e2..076138bc9 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -186,7 +186,7 @@ endif() #add_subdirectory(iverilog) add_subdirectory(libopenfpga) #add_subdirectory(yosys) -add_subdirectory(verilog-to-routing) +add_subdirectory(vtr-verilog-to-routing) add_subdirectory(openfpga) # yosys compilation starts diff --git a/vtr-verilog-to-routing b/vtr-verilog-to-routing index e59d5cd9c..2ee2bae4b 160000 --- a/vtr-verilog-to-routing +++ b/vtr-verilog-to-routing @@ -1 +1 @@ -Subproject commit e59d5cd9c0cee8b39ad5ff1255207825cb56e26c +Subproject commit 2ee2bae4b4bd7222fa7272d38acf3ef098652be7