From 95863e996a12e5ad20e931871716ded8a170fe7c Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Sat, 18 Apr 2020 18:43:56 -0600
Subject: [PATCH] minor update on arch to use auto layout sizing

---
 ...10_tileable_adder_register_scan_chain_depop50_40nm.xml | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/openfpga_flow/arch/vpr_only_templates/k6_frac_N10_tileable_adder_register_scan_chain_depop50_40nm.xml b/openfpga_flow/arch/vpr_only_templates/k6_frac_N10_tileable_adder_register_scan_chain_depop50_40nm.xml
index ce1cc258c..1b51c45af 100755
--- a/openfpga_flow/arch/vpr_only_templates/k6_frac_N10_tileable_adder_register_scan_chain_depop50_40nm.xml
+++ b/openfpga_flow/arch/vpr_only_templates/k6_frac_N10_tileable_adder_register_scan_chain_depop50_40nm.xml
@@ -142,19 +142,19 @@
        This is strongly recommended if you want to PnR large FPGA fabric
     -->
   <layout tileable="true">
-    <!--auto_layout aspect_ratio="1.0"-->
+    <auto_layout aspect_ratio="1.0">
     <!-- Apply a fixed layout of 2x2 core array.
          VPR8 considers the I/O ring in the array size
          Therefore the height and width are both 4
       -->
-    <fixed_layout name="32x32" width="34" height="34">
+    <!-- fixed_layout name="32x32" width="34" height="34" -->
       <!--Perimeter of 'io' blocks with 'EMPTY' blocks at corners-->
       <perimeter type="io" priority="100"/>
       <corners type="EMPTY" priority="101"/>
       <!--Fill with 'clb'-->
       <fill type="clb" priority="10"/>
-    </fixed_layout>
-    <!-- /auto_layout -->
+    <!-- /fixed_layout -->
+    </auto_layout>
   </layout>
   <device>
     <sizing R_minW_nmos="8926" R_minW_pmos="16067"/>