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[test] now heterogeneous testcases for tile modules pass

This commit is contained in:
tangxifan 2023-07-27 20:30:32 -07:00
parent beaa687a20
commit 952e84fce1
1 changed files with 1 additions and 1 deletions
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openfpga_flow/tasks/basic_tests/tile_organization/hetero_fabric_tile/config/task.conf
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@ -22,7 +22,7 @@ openfpga_sim_setting_file=${PATH:OPENFPGA_PATH}/openfpga_flow/openfpga_simulatio
openfpga_vpr_extra_options=--constant_net_method route --skip_sync_clustering_and_routing_results on
openfpga_pb_pin_fixup_command = pb_pin_fixup --verbose
openfpga_vpr_device=3x2
openfpga_vpr_route_chan_width=40
openfpga_vpr_route_chan_width=60
openfpga_group_tile_config_file=${PATH:TASK_DIR}/config/tile_config.xml
openfpga_verilog_testbench_options=