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[Lib] Upgrade fabric key writer to support the BL/WL shift register banks

This commit is contained in:
tangxifan 2021-10-07 17:05:35 -07:00
parent eddafb42c8
commit 92eebd9abb
1 changed files with 104 additions and 0 deletions
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104
libopenfpga/libfabrickey/src/write_xml_fabric_key.cpp
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@ -63,6 +63,106 @@ int write_xml_fabric_component_key(std::fstream& fp,
return 0;
}
/********************************************************************
* A writer to output a BL shift register bank description to XML format
*
* Return 0 if successful
* Return 1 if there are more serious bugs in the architecture
* Return 2 if fail when creating files
*******************************************************************/
static
int write_xml_fabric_bl_shift_register_banks(std::fstream& fp,
const FabricKey& fabric_key,
const FabricRegionId& region) {
/* Validate the file stream */
if (false == openfpga::valid_file_stream(fp)) {
return 2;
}
/* If we have an empty bank, we just skip it */
if (0 == fabric_key.bl_banks(region).size()) {
return 0;
}
/* Write the root node */
openfpga::write_tab_to_file(fp, 2);
fp << "<bl_shift_register_banks>" << "\n";
for (const auto& bank : fabric_key.bl_banks(region)) {
openfpga::write_tab_to_file(fp, 3);
fp << "<bank";
write_xml_attribute(fp, "id", size_t(bank));
std::string port_str;
for (const auto& port : fabric_key.bl_bank_data_ports(region, bank)) {
port_str += generate_xml_port_name(port) + ",";
}
/* Chop the last comma */
if (!port_str.empty()) {
port_str.pop_back();
}
write_xml_attribute(fp, "range", port_str.c_str());
fp << "/>" << "\n";
}
openfpga::write_tab_to_file(fp, 2);
fp << "</bl_shift_register_banks>" << "\n";
return 0;
}
/********************************************************************
* A writer to output a WL shift register bank description to XML format
*
* Return 0 if successful
* Return 1 if there are more serious bugs in the architecture
* Return 2 if fail when creating files
*******************************************************************/
static
int write_xml_fabric_wl_shift_register_banks(std::fstream& fp,
const FabricKey& fabric_key,
const FabricRegionId& region) {
/* Validate the file stream */
if (false == openfpga::valid_file_stream(fp)) {
return 2;
}
/* If we have an empty bank, we just skip it */
if (0 == fabric_key.wl_banks(region).size()) {
return 0;
}
/* Write the root node */
openfpga::write_tab_to_file(fp, 2);
fp << "<wl_shift_register_banks>" << "\n";
for (const auto& bank : fabric_key.wl_banks(region)) {
openfpga::write_tab_to_file(fp, 3);
fp << "<bank";
write_xml_attribute(fp, "id", size_t(bank));
std::string port_str;
for (const auto& port : fabric_key.wl_bank_data_ports(region, bank)) {
port_str += generate_xml_port_name(port) + ",";
}
/* Chop the last comma */
if (!port_str.empty()) {
port_str.pop_back();
}
write_xml_attribute(fp, "range", port_str.c_str());
fp << "/>" << "\n";
}
openfpga::write_tab_to_file(fp, 2);
fp << "</wl_shift_register_banks>" << "\n";
return 0;
}
/********************************************************************
* A writer to output a fabric key to XML format
*
@ -93,6 +193,10 @@ int write_xml_fabric_key(const char* fname,
openfpga::write_tab_to_file(fp, 1);
fp << "<region id=\"" << size_t(region) << "\"" << ">\n";
/* Write shift register banks */
write_xml_fabric_bl_shift_register_banks(fp, fabric_key, region);
write_xml_fabric_wl_shift_register_banks(fp, fabric_key, region);
/* Write component by component */
for (const FabricKeyId& key : fabric_key.region_keys(region)) {
err_code = write_xml_fabric_component_key(fp, fabric_key, key);