From 91b072d7c59867222e528508c8c2f005adf7f017 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Wed, 17 Jun 2020 11:56:40 -0600 Subject: [PATCH] documentation update on the bitstream file format to synchronize with the latest codes --- .../fpga_bitstream/generic_bitstream.rst | 47 ++++++++++++++++++- 1 file changed, 45 insertions(+), 2 deletions(-) diff --git a/docs/source/manual/fpga_bitstream/generic_bitstream.rst b/docs/source/manual/fpga_bitstream/generic_bitstream.rst index 78fbd3de4..7d4bebffa 100644 --- a/docs/source/manual/fpga_bitstream/generic_bitstream.rst +++ b/docs/source/manual/fpga_bitstream/generic_bitstream.rst @@ -6,23 +6,44 @@ Usage Generic bitstream is a fabric-independent bitstream where configuration bits are organized out-of-order in a database. This can be regarded as a raw bitstream used for + - ``debugging``: Hardware engineers can validate if their configuration memories across the FPGA fabric are assigned to expected values + - ``an exchangeable file format for bitstream assembler``: Software engineers can use the raw bitstream to build a bitstream assembler which organize the bitstream in the loadable formate to FPGA chips. + - ``creation of artificial bitstream``: Test engineers can craft artificial bitstreams to test each element of the FPGA fabric, which is typically not synthesizable by VPR. -.. note:: The fabric-independent bitstream cannot be directly loaded to FPGA fabrics +.. warning:: The fabric-independent bitstream cannot be directly loaded to FPGA fabrics File Format ``````````` -OpenFPGA can output the generic bitstream to an XML format, which is easy to debug. As shown in the following XML code, configuration bits are organized block by block, where each block could be a LUT, a routing multiplexer `etc`. Each ``bitstream_block`` includes two sets of information: +OpenFPGA can output the generic bitstream to an XML format, which is easy to debug. As shown in the following XML code, configuration bits are organized block by block, where each block could be a LUT, a routing multiplexer `etc`. Each ``bitstream_block`` includes the follwoing information: - ``hierarchy`` represents the location of this block in FPGA fabric. + The hierachy includes the full hierarchy of this block + + - ``instance`` denotes the instance name which you can find in the fabric netlists + + - ``level`` denotes the depth of the block in the hierarchy + + - ``input_nets`` represents the net names that are mapped to the inputs of block. Unused inputs will be tagged as ``unmapped`` which is a reserved word of OpenFPGA. + + - ``output_nets`` represents the net names that are mapped to the outputs of block. Unused outputs will be tagged as ``unmapped`` which is a reserved word OpenFPGA. - ``bitstream`` represents the configuration bits affiliated to this block. + - ``path_id`` denotes the index of inputs which is propagated to the output. Note that smallest valid index starts from zero. Only routing multiplexers have the path index. Unused routing multiplexer will not have a ``path_id`` of ``-1``, which allows bitstream assembler to freely find the best path in terms of Quality of Results (QoR). A used routing multiplexer should have a zero or positive ``path_id``. + + - ``bit`` denotes a single configuration bit under this block. It contains \ + + - ``memory_port`` the memory port name which you can find in the fabric netlists by following the hierarchy. + + - ``value`` a binary value which is the configuration bit assigned to the memory port. + .. code-block:: xml + @@ -49,3 +70,25 @@ OpenFPGA can output the generic bitstream to an XML format, which is easy to deb + + + + + + + + + + + + SAP_out[1] SAP_out[1] + + + SAP_out[1] + + + + + + +