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update Verilog compact_netlist outputter with RRSwitchBlock classes

This commit is contained in:
tangxifan 2019-05-23 21:52:12 -06:00
parent ee1a24d4ba
commit 8f4f590ff9
5 changed files with 91 additions and 53 deletions
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6
vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c
View File

@ -1068,11 +1068,11 @@ DeviceRRSwitchBlock build_device_rr_switch_blocks(int LL_num_rr_nodes,
LL_device_rr_switch_block.reserve(device_coordinator);
/* For each switch block, determine the size of array */
for (int ix = 0; ix < (nx + 1); ++ix) {
for (int iy = 0; iy < (ny + 1); ++iy) {
for (int ix = 0; ix < nx + 1; ++ix) {
for (int iy = 0; iy < ny + 1; ++iy) {
RRSwitchBlock rr_switch_block = build_rr_switch_block(ix, iy,
LL_num_rr_nodes, LL_rr_node, LL_rr_node_indices);
DeviceCoordinator sb_coordinator(ix, iy);
DeviceCoordinator sb_coordinator((size_t)ix, (size_t)iy);
LL_device_rr_switch_block.add_rr_switch_block(sb_coordinator, rr_switch_block);
}
}

42
vpr7_x2p/vpr/SRC/fpga_x2p/base/rr_blocks.cpp
View File

@ -998,7 +998,7 @@ DeviceCoordinator DeviceRRSwitchBlock::get_switch_block_range() const {
}
/* Get a rr switch block in the array with a coordinator */
RRSwitchBlock DeviceRRSwitchBlock::get_switch_block(DeviceCoordinator coordinator) const {
RRSwitchBlock DeviceRRSwitchBlock::get_switch_block(DeviceCoordinator& coordinator) const {
assert(validate_coordinator(coordinator));
return rr_switch_block_[coordinator.get_x()][coordinator.get_y()];
}
@ -1026,6 +1026,13 @@ RRSwitchBlock DeviceRRSwitchBlock::get_unique_mirror(size_t index) const {
return rr_switch_block_[unique_mirror_[index].get_x()][unique_mirror_[index].get_y()];
}
/* Give a coordinator of a rr switch block, and return its unique mirror */
RRSwitchBlock DeviceRRSwitchBlock::get_unique_mirror(DeviceCoordinator& coordinator) const {
assert(validate_coordinator(coordinator));
size_t unique_mirror_id = rr_switch_block_mirror_id_[coordinator.get_x()][coordinator.get_y()];
return get_unique_mirror(unique_mirror_id);
}
/* Get a rr switch block which a unique mirror */
RRSwitchBlock DeviceRRSwitchBlock::get_rotatable_mirror(size_t index) const {
assert (validate_rotatable_mirror_index(index));
@ -1035,11 +1042,34 @@ RRSwitchBlock DeviceRRSwitchBlock::get_rotatable_mirror(size_t index) const {
/* Public Mutators */
/* TODO: TOBE DEPRECATED!!! conf_bits should be initialized when creating a switch block!!! */
void DeviceRRSwitchBlock::set_rr_switch_block_num_reserved_conf_bits(DeviceCoordinator& coordinator, size_t num_reserved_conf_bits) {
assert(validate_coordinator(coordinator));
rr_switch_block_[coordinator.get_x()][coordinator.get_y()].set_num_reserved_conf_bits(num_reserved_conf_bits);
return;
}
/* TODO: TOBE DEPRECATED!!! conf_bits should be initialized when creating a switch block!!! */
void DeviceRRSwitchBlock::set_rr_switch_block_conf_bits_lsb(DeviceCoordinator& coordinator, size_t conf_bits_lsb) {
assert(validate_coordinator(coordinator));
rr_switch_block_[coordinator.get_x()][coordinator.get_y()].set_conf_bits_lsb(conf_bits_lsb);
return;
}
/* TODO: TOBE DEPRECATED!!! conf_bits should be initialized when creating a switch block!!! */
void DeviceRRSwitchBlock::set_rr_switch_block_conf_bits_msb(DeviceCoordinator& coordinator, size_t conf_bits_msb) {
assert(validate_coordinator(coordinator));
rr_switch_block_[coordinator.get_x()][coordinator.get_y()].set_conf_bits_msb(conf_bits_msb);
return;
}
/* Pre-allocate the rr_switch_block array that the device requires */
void DeviceRRSwitchBlock::reserve(DeviceCoordinator& coordinator) {
rr_switch_block_.reserve(coordinator.get_x());
rr_switch_block_.resize(coordinator.get_x());
rr_switch_block_mirror_id_.resize(coordinator.get_x());
for (size_t x = 0; x < coordinator.get_x(); ++x) {
rr_switch_block_[x].reserve(coordinator.get_y());
rr_switch_block_[x].resize(coordinator.get_y());
rr_switch_block_mirror_id_[x].resize(coordinator.get_y());
}
return;
}
@ -1048,10 +1078,12 @@ void DeviceRRSwitchBlock::reserve(DeviceCoordinator& coordinator) {
void DeviceRRSwitchBlock::resize_upon_need(DeviceCoordinator& coordinator) {
if (coordinator.get_x() + 1 > rr_switch_block_.capacity()) {
rr_switch_block_.resize(coordinator.get_x());
rr_switch_block_mirror_id_.resize(coordinator.get_x());
}
if (coordinator.get_y() + 1 > rr_switch_block_[coordinator.get_x()].capacity()) {
rr_switch_block_[coordinator.get_x()].resize(coordinator.get_y());
rr_switch_block_mirror_id_[coordinator.get_x()].resize(coordinator.get_y());
}
return;
@ -1073,12 +1105,16 @@ void DeviceRRSwitchBlock::add_rr_switch_block(DeviceCoordinator& coordinator,
if (true == get_switch_block(unique_mirror_[mirror_id]).is_mirror(rr_switch_block)) {
/* This is a mirror, raise the flag and we finish */
is_unique_mirror = false;
/* Record the id of unique mirror */
rr_switch_block_mirror_id_[coordinator.get_x()][coordinator.get_y()] = mirror_id;
break;
}
}
/* Add to list if this is a unique mirror*/
if (true == is_unique_mirror) {
unique_mirror_.push_back(coordinator);
/* Record the id of unique mirror */
rr_switch_block_mirror_id_[coordinator.get_x()][coordinator.get_y()] = unique_mirror_.size() - 1;
}
/* TODO: add rotatable mirror support */

7
vpr7_x2p/vpr/SRC/fpga_x2p/base/rr_blocks.h
View File

@ -198,13 +198,17 @@ class DeviceRRSwitchBlock {
public: /* Contructors */
public: /* Accessors */
DeviceCoordinator get_switch_block_range() const; /* get the max coordinator of the switch block array */
RRSwitchBlock get_switch_block(DeviceCoordinator coordinator) const; /* Get a rr switch block in the array with a coordinator */
RRSwitchBlock get_switch_block(DeviceCoordinator& coordinator) const; /* Get a rr switch block in the array with a coordinator */
RRSwitchBlock get_switch_block(size_t x, size_t y) const; /* Get a rr switch block in the array with a coordinator */
size_t get_num_unique_mirror() const; /* get the number of unique mirrors of switch blocks */
size_t get_num_rotatable_mirror() const; /* get the number of rotatable mirrors of switch blocks */
RRSwitchBlock get_unique_mirror(size_t index) const; /* Get a rr switch block which a unique mirror */
RRSwitchBlock get_unique_mirror(DeviceCoordinator& coordinator) const; /* Get a rr switch block which a unique mirror */
RRSwitchBlock get_rotatable_mirror(size_t index) const; /* Get a rr switch block which a unique mirror */
public: /* Mutators */
void set_rr_switch_block_num_reserved_conf_bits(DeviceCoordinator& coordinator, size_t num_reserved_conf_bits); /* TODO: TOBE DEPRECATED!!! conf_bits should be initialized when creating a switch block!!! */
void set_rr_switch_block_conf_bits_lsb(DeviceCoordinator& coordinator, size_t conf_bits_lsb); /* TODO: TOBE DEPRECATED!!! conf_bits should be initialized when creating a switch block!!! */
void set_rr_switch_block_conf_bits_msb(DeviceCoordinator& coordinator, size_t conf_bits_msb); /* TODO: TOBE DEPRECATED!!! conf_bits should be initialized when creating a switch block!!! */
void reserve(DeviceCoordinator& coordinator); /* Pre-allocate the rr_switch_block array that the device requires */
void resize_upon_need(DeviceCoordinator& coordinator); /* Resize the rr_switch_block array if needed */
void add_rr_switch_block(DeviceCoordinator& coordinator, RRSwitchBlock& rr_switch_block); /* Add a switch block to the array, which will automatically identify and update the lists of unique mirrors and rotatable mirrors */
@ -215,6 +219,7 @@ class DeviceRRSwitchBlock {
bool validate_rotatable_mirror_index(size_t index) const; /* Validate if the index in the range of unique_mirror vector*/
private: /* Internal Data */
std::vector< std::vector<RRSwitchBlock> > rr_switch_block_;
std::vector< std::vector<size_t> > rr_switch_block_mirror_id_; /* A map from rr_switch_block to its unique mirror */
std::vector<DeviceCoordinator> unique_mirror_;
std::vector<DeviceCoordinator> rotatable_mirror_;
};

78
vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_compact_netlist.c
View File

@ -747,9 +747,7 @@ void dump_compact_verilog_defined_grids(t_sram_orgz_info* cur_sram_orgz_info,
static
void dump_compact_verilog_defined_one_switch_box(t_sram_orgz_info* cur_sram_orgz_info,
FILE* fp,
t_sb cur_sb_info) {
int ix, iy, side, itrack, x, y, inode;
RRSwitchBlock& rr_sb) {
/* Check the file handler*/
if (NULL == fp) {
vpr_printf(TIO_MESSAGE_ERROR,"(File:%s,[LINE%d])Invalid file handler.\n",
@ -758,25 +756,17 @@ void dump_compact_verilog_defined_one_switch_box(t_sram_orgz_info* cur_sram_orgz
}
/* Check */
assert((!(0 > cur_sb_info.x))&&(!(cur_sb_info.x > (nx + 1))));
assert((!(0 > cur_sb_info.y))&&(!(cur_sb_info.y > (ny + 1))));
x = cur_sb_info.x;
y = cur_sb_info.y;
/* Comment lines */
fprintf(fp, "//----- BEGIN call module Switch blocks [%d][%d] -----\n",
cur_sb_info.x, cur_sb_info.y);
fprintf(fp, "//----- BEGIN call module Switch blocks [%lu][%lu] -----\n",
rr_sb.get_x(), rr_sb.get_y());
/* Print module*/
/* If we have an mirror SB, we should the module name of the mirror !!! */
if (NULL != cur_sb_info.mirror) {
fprintf(fp, "%s ", gen_verilog_one_sb_module_name(cur_sb_info.mirror));
} else {
fprintf(fp, "%s ", gen_verilog_one_sb_module_name(&cur_sb_info));
}
fprintf(fp, "%s ", gen_verilog_one_sb_instance_name(&cur_sb_info));
DeviceCoordinator coordinator = rr_sb.get_coordinator();
RRSwitchBlock unique_mirror = device_rr_switch_block.get_unique_mirror(coordinator);
fprintf(fp, "%s ", unique_mirror.gen_verilog_module_name());
fprintf(fp, "%s ", rr_sb.gen_verilog_instance_name());
fprintf(fp, "(");
fprintf(fp, "\n");
@ -785,24 +775,25 @@ void dump_compact_verilog_defined_one_switch_box(t_sram_orgz_info* cur_sram_orgz
fprintf(fp, ",\n");
}
for (side = 0; side < cur_sb_info.num_sides; side++) {
determine_sb_port_coordinator(cur_sb_info, side, &ix, &iy);
for (size_t side = 0; side < rr_sb.get_num_sides(); ++side) {
Side side_manager(side);
DeviceCoordinator chan_coordinator = rr_sb.get_side_block_coordinator(side_manager.get_side());
fprintf(fp, "//----- %s side channel ports-----\n", convert_side_index_to_string(side));
for (itrack = 0; itrack < cur_sb_info.chan_width[side]; itrack++) {
for (size_t itrack = 0; itrack < rr_sb.get_chan_width(side_manager.get_side()); ++itrack) {
fprintf(fp, "%s,\n",
gen_verilog_routing_channel_one_pin_name(cur_sb_info.chan_rr_node[side][itrack],
ix, iy, itrack,
cur_sb_info.chan_rr_node_direction[side][itrack]));
gen_verilog_routing_channel_one_pin_name(rr_sb.get_chan_node(side_manager.get_side(), itrack),
chan_coordinator.get_x(), chan_coordinator.get_y(), itrack,
rr_sb.get_chan_node_direction(side_manager.get_side(), itrack)));
}
fprintf(fp, "//----- %s side inputs: CLB output pins -----\n", convert_side_index_to_string(side));
/* Dump OPINs of adjacent CLBs */
for (inode = 0; inode < cur_sb_info.num_opin_rr_nodes[side]; inode++) {
for (size_t inode = 0; inode < rr_sb.get_num_opin_nodes(side_manager.get_side()); ++inode) {
dump_verilog_grid_side_pin_with_given_index(fp, IPIN,
cur_sb_info.opin_rr_node[side][inode]->ptc_num,
cur_sb_info.opin_rr_node_grid_side[side][inode],
cur_sb_info.opin_rr_node[side][inode]->xlow,
cur_sb_info.opin_rr_node[side][inode]->ylow,
rr_sb.get_opin_node(side_manager.get_side(), inode)->ptc_num,
rr_sb.get_opin_node_grid_side(side_manager.get_side(), inode),
rr_sb.get_opin_node(side_manager.get_side(), inode)->xlow,
rr_sb.get_opin_node(side_manager.get_side(), inode)->ylow,
FALSE); /* Do not specify the direction of port */
fprintf(fp, ", ");
}
@ -812,28 +803,29 @@ void dump_compact_verilog_defined_one_switch_box(t_sram_orgz_info* cur_sram_orgz
/* Configuration ports */
/* output of each configuration bit */
/* Reserved sram ports */
if (0 < (cur_sb_info.num_reserved_conf_bits)) {
if (0 < (rr_sb.get_num_reserved_conf_bits())) {
dump_verilog_reserved_sram_ports(fp, cur_sram_orgz_info,
0, cur_sb_info.num_reserved_conf_bits - 1,
rr_sb.get_reserved_conf_bits_lsb(),
rr_sb.get_reserved_conf_bits_msb(),
VERILOG_PORT_CONKT);
fprintf(fp, ",\n");
}
/* Normal sram ports */
if (0 < (cur_sb_info.conf_bits_msb - cur_sb_info.conf_bits_lsb)) {
if (0 < rr_sb.get_num_conf_bits()) {
dump_verilog_sram_local_ports(fp, cur_sram_orgz_info,
cur_sb_info.conf_bits_lsb,
cur_sb_info.conf_bits_msb - 1,
rr_sb.get_conf_bits_lsb(),
rr_sb.get_conf_bits_msb(),
VERILOG_PORT_CONKT);
}
/* Dump ports only visible during formal verification*/
if (0 < (cur_sb_info.conf_bits_msb - 1 - cur_sb_info.conf_bits_lsb)) {
if (0 < rr_sb.get_num_conf_bits()) {
fprintf(fp, "\n");
fprintf(fp, "`ifdef %s\n", verilog_formal_verification_preproc_flag);
fprintf(fp, ",\n");
dump_verilog_formal_verification_sram_ports(fp, cur_sram_orgz_info,
cur_sb_info.conf_bits_lsb,
cur_sb_info.conf_bits_msb - 1,
rr_sb.get_conf_bits_lsb(),
rr_sb.get_conf_bits_msb(),
VERILOG_PORT_CONKT);
fprintf(fp, "\n");
fprintf(fp, "`endif\n");
@ -841,7 +833,9 @@ void dump_compact_verilog_defined_one_switch_box(t_sram_orgz_info* cur_sram_orgz
fprintf(fp, ");\n");
/* Comment lines */
fprintf(fp, "//----- END call module Switch blocks [%d][%d] -----\n\n", x, y);
fprintf(fp,
"//----- END call module Switch blocks [%lu][%lu] -----\n\n",
rr_sb.get_x(), rr_sb.get_y());
/* Free */
@ -851,8 +845,7 @@ void dump_compact_verilog_defined_one_switch_box(t_sram_orgz_info* cur_sram_orgz
void dump_compact_verilog_defined_switch_boxes(t_sram_orgz_info* cur_sram_orgz_info,
FILE* fp) {
int ix, iy;
DeviceCoordinator sb_range = device_rr_switch_block.get_switch_block_range();
/* Check the file handler*/
if (NULL == fp) {
vpr_printf(TIO_MESSAGE_ERROR,"(File:%s,[LINE%d])Invalid file handler.\n",
@ -860,9 +853,10 @@ void dump_compact_verilog_defined_switch_boxes(t_sram_orgz_info* cur_sram_orgz_i
exit(1);
}
for (ix = 0; ix < (nx + 1); ix++) {
for (iy = 0; iy < (ny + 1); iy++) {
dump_compact_verilog_defined_one_switch_box(cur_sram_orgz_info, fp, sb_info[ix][iy]);
for (size_t ix = 0; ix < sb_range.get_x(); ++ix) {
for (size_t iy = 0; iy < sb_range.get_y(); ++iy) {
RRSwitchBlock rr_sb = device_rr_switch_block.get_switch_block(ix, iy);
dump_compact_verilog_defined_one_switch_box(cur_sram_orgz_info, fp, rr_sb);
}
}

11
vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_routing.c
View File

@ -1738,7 +1738,6 @@ size_t count_verilog_switch_box_conf_bits(t_sram_orgz_info* cur_sram_orgz_info,
return num_conf_bits;
}
/* Task: Print the subckt of a Switch Box.
* A Switch Box subckt consists of following ports:
* 1. Channel Y [x][y] inputs
@ -1788,10 +1787,14 @@ void dump_verilog_routing_switch_box_unique_subckt(t_sram_orgz_info* cur_sram_or
/* Estimate the sram_verilog_model->cnt */
int cur_num_sram = get_sram_orgz_info_num_mem_bit(cur_sram_orgz_info);
int esti_sram_cnt = cur_num_sram + num_conf_bits;
/* Record the index */
/* Record the index: TODO: clean this mess, move to FPGA_X2P_SETUP !!!*/
DeviceCoordinator sb_coordinator(rr_sb.get_x(), rr_sb.get_y());
device_rr_switch_block.set_rr_switch_block_num_reserved_conf_bits(sb_coordinator, num_reserved_conf_bits);
device_rr_switch_block.set_rr_switch_block_conf_bits_lsb(sb_coordinator, cur_num_sram);
device_rr_switch_block.set_rr_switch_block_conf_bits_msb(sb_coordinator, cur_num_sram + num_conf_bits - 1);
rr_sb.set_num_reserved_conf_bits(num_reserved_conf_bits);
rr_sb.set_conf_bits_lsb(cur_num_sram);
rr_sb.set_conf_bits_msb(cur_num_sram + num_conf_bits);
rr_sb.set_conf_bits_msb(cur_num_sram + num_conf_bits - 1);
/* Create file handler */
fp = verilog_create_one_subckt_file(subckt_dir, "Unique Switch Block ",
@ -1881,7 +1884,7 @@ void dump_verilog_routing_switch_box_unique_subckt(t_sram_orgz_info* cur_sram_or
/* Local wires for memory configurations */
dump_verilog_sram_config_bus_internal_wires(fp, cur_sram_orgz_info,
rr_sb.get_conf_bits_lsb(),
rr_sb.get_conf_bits_msb() - 1);
rr_sb.get_conf_bits_msb());
/* Put down all the multiplexers */
for (size_t side = 0; side < rr_sb.get_num_sides(); ++side) {