From 8e04d473f2bad4de7d457ee43e7ad40233d8d00f Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Wed, 18 Sep 2024 21:10:31 -0700
Subject: [PATCH] [core] code format

---
 .../src/check_circuit_library.cpp             | 50 +++++++++++--------
 1 file changed, 30 insertions(+), 20 deletions(-)

diff --git a/libs/libarchopenfpga/src/check_circuit_library.cpp b/libs/libarchopenfpga/src/check_circuit_library.cpp
index 35e84f416..a9852a7e5 100644
--- a/libs/libarchopenfpga/src/check_circuit_library.cpp
+++ b/libs/libarchopenfpga/src/check_circuit_library.cpp
@@ -803,38 +803,48 @@ static size_t check_io_circuit_model(const CircuitLibrary& circuit_lib) {
 /************************************************************************
  * Check the last stage pass gate logic model is the same type as default
  ***********************************************************************/
-static 
-size_t check_pass_gate_circuit_model_consistency(const CircuitLibrary& circuit_lib) {
+static size_t check_pass_gate_circuit_model_consistency(
+  const CircuitLibrary& circuit_lib) {
   size_t num_err = 0;
 
-  for (const CircuitModelId& mux_model : circuit_lib.models_by_type(CIRCUIT_MODEL_MUX)) {
+  for (const CircuitModelId& mux_model :
+       circuit_lib.models_by_type(CIRCUIT_MODEL_MUX)) {
     CircuitModelId pgl_model = circuit_lib.pass_gate_logic_model(mux_model);
-    CircuitModelId last_stage_pgl_model = circuit_lib.last_stage_pass_gate_logic_model(mux_model);
+    CircuitModelId last_stage_pgl_model =
+      circuit_lib.last_stage_pass_gate_logic_model(mux_model);
     if (!circuit_lib.valid_model_id(pgl_model)) {
-      VTR_LOGF_ERROR(__FILE__, __LINE__,
-                     "The pass-gate logic circuit model '%s' of '%s' is not valid!\n",
-                     circuit_lib.pass_gate_logic_model_name(mux_model).c_str(),
-                     circuit_lib.model_name(mux_model).c_str());
+      VTR_LOGF_ERROR(
+        __FILE__, __LINE__,
+        "The pass-gate logic circuit model '%s' of '%s' is not valid!\n",
+        circuit_lib.pass_gate_logic_model_name(mux_model).c_str(),
+        circuit_lib.model_name(mux_model).c_str());
       num_err++;
     }
     if (!circuit_lib.valid_model_id(last_stage_pgl_model)) {
-      VTR_LOGF_ERROR(__FILE__, __LINE__,
-                     "The last stage pass-gate logic circuit model '%s' of '%s' is not valid!\n",
-                     circuit_lib.last_stage_pass_gate_logic_model_name(mux_model).c_str(),
-                     circuit_lib.model_name(mux_model).c_str());
+      VTR_LOGF_ERROR(
+        __FILE__, __LINE__,
+        "The last stage pass-gate logic circuit model '%s' of '%s' is not "
+        "valid!\n",
+        circuit_lib.last_stage_pass_gate_logic_model_name(mux_model).c_str(),
+        circuit_lib.model_name(mux_model).c_str());
       num_err++;
     }
-    if (circuit_lib.model_type(pgl_model) != circuit_lib.model_type(last_stage_pgl_model)) {
-      VTR_LOGF_ERROR(__FILE__, __LINE__,
-                     "The last stage pass-gate logic circuit model '%s' of '%s' should be the same type as its regular pass-gate logic model '%s'!\n",
-                     circuit_lib.model_name(last_stage_pgl_model).c_str(),
-                     circuit_lib.model_name(mux_model).c_str(),
-                     circuit_lib.model_name(pgl_model).c_str());
+    if (circuit_lib.model_type(pgl_model) !=
+        circuit_lib.model_type(last_stage_pgl_model)) {
+      VTR_LOGF_ERROR(
+        __FILE__, __LINE__,
+        "The last stage pass-gate logic circuit model '%s' of '%s' should be "
+        "the same type as its regular pass-gate logic model '%s'!\n",
+        circuit_lib.model_name(last_stage_pgl_model).c_str(),
+        circuit_lib.model_name(mux_model).c_str(),
+        circuit_lib.model_name(pgl_model).c_str());
       num_err++;
     }
-    if (pgl_model != last_stage_pgl_model && circuit_lib.gate_type(pgl_model) != CIRCUIT_MODEL_GATE_MUX2) {
+    if (pgl_model != last_stage_pgl_model &&
+        circuit_lib.gate_type(pgl_model) != CIRCUIT_MODEL_GATE_MUX2) {
       VTR_LOGF_ERROR(__FILE__, __LINE__,
-                     "The last stage pass-gate logic circuit model '%s' of '%s' should be a MUX2 gate!\n",
+                     "The last stage pass-gate logic circuit model '%s' of "
+                     "'%s' should be a MUX2 gate!\n",
                      circuit_lib.model_name(last_stage_pgl_model).c_str(),
                      circuit_lib.model_name(mux_model).c_str());
       num_err++;