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fixed critical bugs in Connection Block Unique Module detection

This commit is contained in:
tangxifan 2019-06-06 16:31:50 -06:00
parent 4f543c510c
commit 8c1e7b799f
3 changed files with 40 additions and 63 deletions
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98
vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c
View File

@ -200,8 +200,8 @@ boolean is_two_cb_rr_nodes_mirror(t_cb* src_cb, t_cb* des_cb,
} }
int src_node_id, des_node_id; int src_node_id, des_node_id;
int src_node_side, des_node_side; int src_node_side, des_node_side;
get_rr_node_side_and_index_in_cb_info(src_rr_node->drive_rr_nodes[inode], *src_cb, OUT_PORT, &src_node_side, &src_node_id); get_rr_node_side_and_index_in_cb_info(src_rr_node->drive_rr_nodes[inode], *src_cb, IN_PORT, &src_node_side, &src_node_id);
get_rr_node_side_and_index_in_cb_info(des_rr_node->drive_rr_nodes[inode], *des_cb, OUT_PORT, &des_node_side, &des_node_id); get_rr_node_side_and_index_in_cb_info(des_rr_node->drive_rr_nodes[inode], *des_cb, IN_PORT, &des_node_side, &des_node_id);
if (src_node_id != des_node_id) { if (src_node_id != des_node_id) {
return FALSE; return FALSE;
} }
@ -523,7 +523,7 @@ void identify_mirror_switch_blocks() {
assign_mirror_switch_blocks(); assign_mirror_switch_blocks();
/* Ensure all the mirror are the upstream */ /* Ensure all the mirror are the upstream */
update_mirror_switch_blocks(); /* update_mirror_switch_blocks(); */
/* Validate the mirror of switch blocks, everyone should be the upstream */ /* Validate the mirror of switch blocks, everyone should be the upstream */
assert(TRUE == validate_mirror_switch_blocks()); assert(TRUE == validate_mirror_switch_blocks());
@ -595,77 +595,53 @@ boolean is_two_connection_blocks_mirror(t_cb* src, t_cb* des) {
} }
void assign_mirror_connection_blocks() { void assign_mirror_connection_blocks() {
std::vector<t_cb*> cbx_mirror;
std::vector<t_cb*> cby_mirror;
/* Make sure a clean start */
cbx_mirror.clear();
/* X - channels [1...nx][0..ny]*/ /* X - channels [1...nx][0..ny]*/
for (int iy = 0; iy < (ny + 1); iy++) { for (int iy = 0; iy < (ny + 1); ++iy) {
for (int ix = 1; ix < (nx + 1); ix++) { for (int ix = 1; ix < (nx + 1); ++ix) {
for (int jx = ix; jx < (nx + 1); jx++) { bool is_unique_mirror = true;
/* bypass the same one */ for (size_t id = 0; id < cbx_mirror.size(); ++id) {
if (ix == jx) {
continue;
}
/* Do one-to-one comparison */ /* Do one-to-one comparison */
if (FALSE == is_two_connection_blocks_mirror(&(cbx_info[ix][iy]), &(cbx_info[jx][iy]))) { if (TRUE == is_two_connection_blocks_mirror(cbx_mirror[id], &(cbx_info[ix][iy]))) {
/* Nothing to do if the two switch blocks are not equivalent */
continue;
}
/* configure the mirror of the second switch block */ /* configure the mirror of the second switch block */
assign_connection_block_mirror(&(cbx_info[ix][iy]), &(cbx_info[jx][iy])); assign_connection_block_mirror(cbx_mirror[id], &(cbx_info[ix][iy]));
/* Raise a flag and later add it to the unique mirror list if the two switch blocks are not equivalent */
is_unique_mirror = false;
break;
}
}
/* Update the mirror list if necessary */
if (true == is_unique_mirror) {
cbx_mirror.push_back(&(cbx_info[ix][iy]));
} }
} }
} }
for (int ix = 1; ix < (nx + 1); ix++) { /* Make sure a clean start */
for (int iy = 0; iy < (ny + 1); iy++) { cby_mirror.clear();
for (int jy = iy; jy < (ny + 1); jy++) {
/* bypass the same one */
if (iy == jy) {
continue;
}
/* Do one-to-one comparison */
if (FALSE == is_two_connection_blocks_mirror(&(cbx_info[ix][iy]), &(cbx_info[ix][jy]))) {
/* Nothing to do if the two switch blocks are not equivalent */
continue;
}
/* configure the mirror of the second switch block */
assign_connection_block_mirror(&(cbx_info[ix][iy]), &(cbx_info[ix][jy]));
}
}
}
/* Y - channels [1...ny][0..nx]*/ /* Y - channels [1...ny][0..nx]*/
for (int ix = 0; ix < (nx + 1); ix++) { for (int ix = 0; ix < (nx + 1); ++ix) {
for (int iy = 1; iy < (ny + 1); iy++) { for (int iy = 1; iy < (ny + 1); ++iy) {
for (int jy = iy; jy < (ny + 1); jy++) { bool is_unique_mirror = true;
/* bypass the same one */ for (size_t id = 0; id < cby_mirror.size(); ++id) {
if (iy == jy) {
continue;
}
/* Do one-to-one comparison */ /* Do one-to-one comparison */
if (FALSE == is_two_connection_blocks_mirror(&(cby_info[ix][iy]), &(cby_info[ix][jy]))) { if (TRUE == is_two_connection_blocks_mirror(cby_mirror[id], &(cby_info[ix][iy]))) {
/* Nothing to do if the two switch blocks are not equivalent */
continue;
}
/* configure the mirror of the second switch block */ /* configure the mirror of the second switch block */
assign_connection_block_mirror(&(cby_info[ix][iy]), &(cby_info[ix][jy])); assign_connection_block_mirror(cby_mirror[id], &(cby_info[ix][iy]));
/* Raise a flag and later add it to the unique mirror list if the two switch blocks are not equivalent */
is_unique_mirror = false;
break;
} }
} }
} /* Update the mirror list if necessary */
if (true == is_unique_mirror) {
for (int iy = 1; iy < (ny + 1); iy++) { cby_mirror.push_back(&(cby_info[ix][iy]));
for (int ix = 0; ix < (nx + 1); ix++) {
for (int jx = ix; jx < (nx + 1); jx++) {
/* bypass the same one */
if (ix == jx) {
continue;
}
/* Do one-to-one comparison */
if (FALSE == is_two_connection_blocks_mirror(&(cby_info[ix][iy]), &(cby_info[jx][iy]))) {
/* Nothing to do if the two switch blocks are not equivalent */
continue;
}
/* configure the mirror of the second switch block */
assign_connection_block_mirror(&(cby_info[ix][iy]), &(cby_info[jx][iy]));
} }
} }
} }
@ -680,7 +656,9 @@ void identify_mirror_connection_blocks() {
assign_mirror_connection_blocks(); assign_mirror_connection_blocks();
/* Ensure all the mirror are the upstream */ /* Ensure all the mirror are the upstream */
/*
update_mirror_connection_blocks(); update_mirror_connection_blocks();
*/
/* Validate the mirror of switch blocks, everyone should be the upstream */ /* Validate the mirror of switch blocks, everyone should be the upstream */
assert(TRUE == validate_mirror_connection_blocks()); assert(TRUE == validate_mirror_connection_blocks());

1
vpr7_x2p/vpr/SRC/fpga_x2p/base/rr_blocks.cpp
View File

@ -1223,7 +1223,6 @@ void RRSwitchBlock::set(const RRSwitchBlock& src) {
} }
/* Copy conf_bits /* Copy conf_bits
* TODO: this will be recovered when num_conf_bits etc will be initialized during FPGA-X2P setup
*/ */
this->set_num_reserved_conf_bits(src.get_num_reserved_conf_bits()); this->set_num_reserved_conf_bits(src.get_num_reserved_conf_bits());
this->set_conf_bits_lsb(src.get_conf_bits_lsb()); this->set_conf_bits_lsb(src.get_conf_bits_lsb());

2
vpr7_x2p/vpr/SRC/fpga_x2p/base/write_rr_blocks.cpp
View File

@ -16,7 +16,7 @@ void write_rr_switch_block_to_xml(std::string fname_prefix, RRSwitchBlock& rr_sb
fname += rr_sb.gen_verilog_module_name(); fname += rr_sb.gen_verilog_module_name();
fname += ".xml"; fname += ".xml";
vpr_printf(TIO_MESSAGE_INFO, "Output SB XML: %s\n", fname.c_str()); vpr_printf(TIO_MESSAGE_INFO, "Output SB XML: %s\r", fname.c_str());
/* Create a file handler*/ /* Create a file handler*/
std::fstream fp; std::fstream fp;