[Script] Now multi-clock openfpga shell script no longer needs activity file
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@ -12,7 +12,11 @@ read_openfpga_simulation_setting -f ${OPENFPGA_SIM_SETTING_FILE}
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# Annotate the OpenFPGA architecture to VPR data base
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# Annotate the OpenFPGA architecture to VPR data base
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# to debug use --verbose options
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# to debug use --verbose options
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link_openfpga_arch --activity_file ${ACTIVITY_FILE} --sort_gsb_chan_node_in_edges
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# Note: no need to assign activity file when you used a fixed number
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# of clock cycles in simulation settings
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# Also, ACE2 does not support multiple clocks
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# Therefore, activity file is not recommended for multi-clock fabric/implementations
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link_openfpga_arch --sort_gsb_chan_node_in_edges
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# Check and correct any naming conflicts in the BLIF netlist
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# Check and correct any naming conflicts in the BLIF netlist
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check_netlist_naming_conflict --fix --report ./netlist_renaming.xml
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check_netlist_naming_conflict --fix --report ./netlist_renaming.xml
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