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Use template variables

This commit is contained in:
Szymon Kulis 2020-01-05 20:39:10 +01:00
parent ffe90b1da6
commit 895aca1bf1
1 changed files with 17 additions and 17 deletions
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34
fpga_flow/configs/tutorial/tuto.conf
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@ -1,27 +1,27 @@
# Standard Configuration Example # Standard Configuration Example
[dir_path] [dir_path]
script_base = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/scripts/ script_base = OPENFPGAPATHKEYWORD/fpga_flow/scripts/
benchmark_dir = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/benchmarks/Verilog/MCNC benchmark_dir = OPENFPGAPATHKEYWORD/fpga_flow/benchmarks/Verilog/MCNC
yosys_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/yosys/yosys yosys_path = OPENFPGAPATHKEYWORD/yosys/yosys
odin2_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/not_used_atm/odin2.exe odin2_path = OPENFPGAPATHKEYWORD/fpga_flow/not_used_atm/odin2.exe
cirkit_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/not_used_atm/cirkit cirkit_path = OPENFPGAPATHKEYWORD/fpga_flow/not_used_atm/cirkit
abc_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/yosys/yosys-abc abc_path = OPENFPGAPATHKEYWORD/yosys/yosys-abc
abc_mccl_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/abc_with_bb_support/abc abc_mccl_path = OPENFPGAPATHKEYWORD/abc_with_bb_support/abc
abc_with_bb_support_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/abc_with_bb_support/abc abc_with_bb_support_path = OPENFPGAPATHKEYWORD/abc_with_bb_support/abc
mpack1_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/not_used_atm/mpack1 mpack1_path = OPENFPGAPATHKEYWORD/fpga_flow/not_used_atm/mpack1
m2net_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/not_used_atm/m2net m2net_path = OPENFPGAPATHKEYWORD/fpga_flow/not_used_atm/m2net
mpack2_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/not_used_atm/mpack2 mpack2_path = OPENFPGAPATHKEYWORD/fpga_flow/not_used_atm/mpack2
vpr_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/vpr7_x2p/vpr/vpr vpr_path = OPENFPGAPATHKEYWORD/vpr7_x2p/vpr/vpr
rpt_dir = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/results_tutorial rpt_dir = OPENFPGAPATHKEYWORD/fpga_flow/results_tutorial
ace_path = /research/ece/lnis/USERS/tang/github/OpenFPGA/ace2/ace ace_path = OPENFPGAPATHKEYWORD/ace2/ace
[flow_conf] [flow_conf]
flow_type = yosys_vpr #standard|mpack2|mpack1|vtr_standard|vtr|yosys_vpr flow_type = yosys_vpr #standard|mpack2|mpack1|vtr_standard|vtr|yosys_vpr
vpr_arch = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/arch/generated/k6_N10_sram_chain_HC.xml vpr_arch = OPENFPGAPATHKEYWORD/fpga_flow/arch/generated/k6_N10_sram_chain_HC.xml
mpack1_abc_stdlib = DRLC7T_SiNWFET.genlib # Use relative path under ABC folder is OK mpack1_abc_stdlib = DRLC7T_SiNWFET.genlib # Use relative path under ABC folder is OK
m2net_conf = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/m2net_conf/m2x2_SiNWFET.conf m2net_conf = OPENFPGAPATHKEYWORD/fpga_flow/m2net_conf/m2x2_SiNWFET.conf
mpack2_arch = K6_pattern7_I24.arch mpack2_arch = K6_pattern7_I24.arch
power_tech_xml = /research/ece/lnis/USERS/tang/github/OpenFPGA/fpga_flow/tech/PTM_45nm/45nm.xml # Use relative path under VPR folder is OK power_tech_xml = OPENFPGAPATHKEYWORD/fpga_flow/tech/PTM_45nm/45nm.xml # Use relative path under VPR folder is OK
[csv_tags] [csv_tags]
mpack1_tags = Global mapping efficiency:|efficiency:|occupancy wo buf:|efficiency wo buf: mpack1_tags = Global mapping efficiency:|efficiency:|occupancy wo buf:|efficiency wo buf: