Bring mux bitstream generation online
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tangxifan
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/********************************************************************
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* This file includes functions to build bitstream from routing multiplexers
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* which are based on different technology
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*******************************************************************/
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/* Headers from vtrutil library */
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#include "vtr_log.h"
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#include "vtr_assert.h"
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#include "vtr_vector.h"
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/* Headers from openfpgautil library */
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#include "openfpga_decode.h"
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#include "mux_utils.h"
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#include "decoder_library_utils.h"
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#include "build_mux_bitstream.h"
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/* begin namespace openfpga */
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namespace openfpga {
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/* Default path ID of a unused multiplexer */
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#define DEFAULT_PATH_ID -1
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/* Default path ID of a unused multiplexer when there are no constant inputs*/
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#define DEFAULT_MUX_PATH_ID 0
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/********************************************************************
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* Find the default path id of a MUX
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* This is applied when the path id specified is DEFAULT_PATH_ID,
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* which is not correlated to the MUX implementation
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* This function is binding the default path id to the implemented structure
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* 1. If the MUX has a constant input, the default path id will be
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* directed to the last input of the MUX, which is the constant input
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* 2. If the MUX does not have a constant input, the default path id
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* will the first input of the MUX.
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*
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* Restriction:
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* we assume the default path is the first input of the MUX
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* Change if this is not what you want
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*******************************************************************/
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size_t find_mux_default_path_id(const CircuitLibrary& circuit_lib,
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const CircuitModelId& mux_model,
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const size_t& mux_size) {
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size_t default_path_id;
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if (true == circuit_lib.mux_add_const_input(mux_model)) {
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default_path_id = mux_size - 1; /* When there is a constant input, use the last path */
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} else {
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default_path_id = DEFAULT_MUX_PATH_ID; /* When there is no constant input, use the default one */
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}
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return default_path_id;
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}
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/********************************************************************
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* This function generates bitstream for a CMOS routing multiplexer
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* Thanks to MuxGraph object has already describe the internal multiplexing
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* structure, bitstream generation is simply done by routing the signal
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* to from a given input to the output
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* All the memory bits can be generated by an API of MuxGraph
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*
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* To be generic, this function only returns a vector bit values
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* without touching an bitstream-relate data structure
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*******************************************************************/
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static
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std::vector<bool> build_cmos_mux_bitstream(const CircuitLibrary& circuit_lib,
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const CircuitModelId& mux_model,
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const MuxLibrary& mux_lib,
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const size_t& mux_size,
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const int& path_id) {
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/* Note that the size of implemented mux could be different than the mux size we see here,
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* due to the constant inputs
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* We will find the input size of implemented MUX and fetch the graph-based representation in MUX library
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*/
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size_t implemented_mux_size = find_mux_implementation_num_inputs(circuit_lib, mux_model, mux_size);
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/* Note that the mux graph is indexed using datapath MUX size!!!! */
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MuxId mux_graph_id = mux_lib.mux_graph(mux_model, mux_size);
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const MuxGraph mux_graph = mux_lib.mux_graph(mux_graph_id);
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size_t datapath_id = path_id;
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/* Find the path_id related to the implementation */
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if (DEFAULT_PATH_ID == path_id) {
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datapath_id = find_mux_default_path_id(circuit_lib, mux_model, implemented_mux_size);
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} else {
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VTR_ASSERT( datapath_id < mux_size);
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}
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/* Path id should makes sense */
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VTR_ASSERT(datapath_id < mux_graph.inputs().size());
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/* We should have only one output for this MUX! */
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VTR_ASSERT(1 == mux_graph.outputs().size());
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/* Generate the memory bits */
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vtr::vector<MuxMemId, bool> raw_bitstream = mux_graph.decode_memory_bits(MuxInputId(datapath_id), mux_graph.output_id(mux_graph.outputs()[0]));
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std::vector<bool> mux_bitstream;
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for (const bool& bit : raw_bitstream) {
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mux_bitstream.push_back(bit);
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}
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/* Consider local encoder support, we need further encode the bitstream */
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if (false == circuit_lib.mux_use_local_encoder(mux_model)) {
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return mux_bitstream;
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}
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/* Clear the mux_bitstream, we need to apply encoding */
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mux_bitstream.clear();
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/* Encode the memory bits level by level,
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* One local encoder is used for each level of multiplexers
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*/
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for (const size_t& level : mux_graph.levels()) {
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/* The encoder will convert the path_id to a binary number
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* For example: when path_id=3 (use the 4th input), using a 2-input encoder
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* the sram_bits will be the 2-digit binary number of 3: 10
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*/
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std::vector<size_t> encoder_data;
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/* Exception: there is only 1 memory at this level, bitstream will not be changed!!! */
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if (1 == mux_graph.memories_at_level(level).size()) {
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mux_bitstream.push_back(raw_bitstream[mux_graph.memories_at_level(level)[0]]);
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continue;
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}
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/* Otherwise: we follow a regular recipe */
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for (size_t mem_index = 0; mem_index < mux_graph.memories_at_level(level).size(); ++mem_index) {
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/* Conversion rule: true = 1, false = 0 */
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if (true == raw_bitstream[mux_graph.memories_at_level(level)[mem_index]]) {
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encoder_data.push_back(mem_index);
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}
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}
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/* There should be at most one '1' */
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VTR_ASSERT( (0 == encoder_data.size()) || (1 == encoder_data.size()));
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/* Convert to encoded bits */
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std::vector<size_t> encoder_addr;
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if (0 == encoder_data.size()) {
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encoder_addr = itobin_vec(0, find_mux_local_decoder_addr_size(mux_graph.memories_at_level(level).size()));
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} else {
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VTR_ASSERT(1 == encoder_data.size());
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encoder_addr = itobin_vec(encoder_data[0], find_mux_local_decoder_addr_size(mux_graph.memories_at_level(level).size()));
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}
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/* Build final mux bitstream */
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for (const size_t& bit : encoder_addr) {
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mux_bitstream.push_back(1 == bit);
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}
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}
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return mux_bitstream;
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}
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/********************************************************************
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* This function generates bitstream for a routing multiplexer
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* supporting both CMOS and ReRAM multiplexer designs
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*******************************************************************/
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std::vector<bool> build_mux_bitstream(const CircuitLibrary& circuit_lib,
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const CircuitModelId& mux_model,
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const MuxLibrary& mux_lib,
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const size_t& mux_size,
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const int& path_id) {
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std::vector<bool> mux_bitstream;
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switch (circuit_lib.design_tech_type(mux_model)) {
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case CIRCUIT_MODEL_DESIGN_CMOS:
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mux_bitstream = build_cmos_mux_bitstream(circuit_lib, mux_model, mux_lib, mux_size, path_id);
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break;
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case CIRCUIT_MODEL_DESIGN_RRAM:
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/* TODO: ReRAM MUX needs a different bitstream generation strategy */
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break;
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default:
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VTR_LOGF_ERROR(__FILE__, __LINE__,
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"Invalid design technology for circuit model '%s'!\n",
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circuit_lib.model_name(mux_model).c_str());
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exit(1);
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}
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return mux_bitstream;
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}
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} /* end namespace openfpga */
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@ -0,0 +1,30 @@
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#ifndef BUILD_MUX_BITSTREAM_H
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#define BUILD_MUX_BITSTREAM_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include <vector>
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#include "circuit_library.h"
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#include "mux_library.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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/* begin namespace openfpga */
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namespace openfpga {
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size_t find_mux_default_path_id(const CircuitLibrary& circuit_lib,
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const CircuitModelId& mux_model,
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const size_t& mux_size);
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std::vector<bool> build_mux_bitstream(const CircuitLibrary& circuit_lib,
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const CircuitModelId& mux_model,
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const MuxLibrary& mux_lib,
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const size_t& mux_size,
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const int& path_id);
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} /* end namespace openfpga */
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#endif
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