From 858bb2f21ec16a812ee1debd05137726990b2388 Mon Sep 17 00:00:00 2001
From: bbleaptrot <35536624+bbleaptrot@users.noreply.github.com>
Date: Wed, 16 Jun 2021 12:45:04 -0600
Subject: [PATCH] fix mistake in first line of page

---
 .../tutorials/arch_modeling/user_defined_temp_tutorial.rst      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/source/tutorials/arch_modeling/user_defined_temp_tutorial.rst b/docs/source/tutorials/arch_modeling/user_defined_temp_tutorial.rst
index fedcd0b5e..f2ba6e4bf 100644
--- a/docs/source/tutorials/arch_modeling/user_defined_temp_tutorial.rst
+++ b/docs/source/tutorials/arch_modeling/user_defined_temp_tutorial.rst
@@ -1,4 +1,4 @@
-.. tutorial_user_def_temp:
+.. _tutorial_user_def_temp:
 
 Integrating Custom Verilog Modules with user_defined_template.v
 ================================================================