Test removing the shell specification in fpga_flow.pl
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AurelienUoU
parent
43a64c26e8
commit
82c76a2c39
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@ -585,7 +585,7 @@ sub run_abc_libmap($ $ $)
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($abc_seq_optimize) = ("scl -l;");
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}
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# !!! For standard library, we cannot use sweep ???
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system("/bin/csh -cx './$abc_name -c \"read_blif $bm; resyn2; read_library $mpack1_stdlib; $abc_seq_optimize map -v; write_blif $blif_out; quit;\" > $log'");
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system("./$abc_name -c \"read_blif $bm; resyn2; read_library $mpack1_stdlib; $abc_seq_optimize map -v; write_blif $blif_out; quit;\" > $log");
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chdir $cwd;
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}
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@ -619,7 +619,7 @@ sub run_rewrite_verilog($ $ $ $ $) {
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#
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# Create a local copy for the commands
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system("/bin/csh -cx './$yosys_name $cmd_log > $log'");
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system("./$yosys_name $cmd_log > $log");
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if (!(-e $new_verilog)) {
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die "ERROR: Yosys fail at rewriting benchmark $bm.\n";
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@ -684,7 +684,7 @@ sub run_yosys_fpgamap($ $ $ $) {
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#
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# Create a local copy for the commands
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system("/bin/csh -cx './$yosys_name $cmd_log > $log'");
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system("./$yosys_name $cmd_log > $log");
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if (!(-e $blif_out)) {
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die "ERROR: Fail Yosys for benchmark $bm.\n";
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@ -732,7 +732,7 @@ sub run_abc_fpgamap($ $ $)
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#
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# Create a local copy for the commands
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system("/bin/csh -cx './$abc_name -F $cmd_log > $log'");
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system("./$abc_name -F $cmd_log > $log");
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if (!(-e $blif_out)) {
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die "ERROR: Fail ABC for benchmark $bm.\n";
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@ -767,7 +767,7 @@ sub run_abc_bb_fpgamap($ $ $) {
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chdir $abc_dir;
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# Run FPGA ABC
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system("/bin/csh -cx './$abc_name -c \"read $bm; resyn; resyn2; $fpga_synthesis_method -K $lut_num; $abc_seq_optimize sweep; write_hie $bm $blif_out; $dump_verilog; quit;\" > $log'");
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system("./$abc_name -c \"read $bm; resyn; resyn2; $fpga_synthesis_method -K $lut_num; $abc_seq_optimize sweep; write_hie $bm $blif_out; $dump_verilog; quit;\" > $log");
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if (!(-e $blif_out)) {
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die "ERROR: Fail ABC_with_bb_support for benchmark $bm.\n";
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@ -809,19 +809,19 @@ sub run_abc_mccl_fpgamap($ $ $)
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# Run ABC three times:
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# 1st time: run abc_with_mccl: read the $bm and do carry-chain detection
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system("/bin/csh -cx './$abc_mccl_name -c \"read $bm; strash; &get; &fadds -nv -N $min_chain_length; \&getspec; \&put; wfadds $fadds_blif; quit;\" > $log.ccdetect'");
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system("./$abc_mccl_name -c \"read $bm; strash; &get; &fadds -nv -N $min_chain_length; \&getspec; \&put; wfadds $fadds_blif; quit;\" > $log.ccdetect");
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# Repeat chdir for multi-thread supporting!
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chdir $abc_mccl_dir;
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print "INFO: entering abc_mccl directory: $abc_mccl_dir \n";
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# 2nd time: run abc_with_mccl: read the $fadds_blif and do carry-chain LUT premapping
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system("/bin/csh -cx './$abc_mccl_name -c \"read $fadds_blif; resyn; resyn2; mccl -A $mccl_opt_A -B $mccl_opt_B -S $mccl_opt_S -K $lut_num -O 1 -r -o $interm_blif; quit;\" > $log.mccl'");
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system("./$abc_mccl_name -c \"read $fadds_blif; resyn; resyn2; mccl -A $mccl_opt_A -B $mccl_opt_B -S $mccl_opt_S -K $lut_num -O 1 -r -o $interm_blif; quit;\" > $log.mccl");
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chdir $abc_bb_dir;
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print "INFO: entering abc_with_bb_support directory: $abc_bb_dir \n";
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# 3rd time: run abc_with_bb_support: read the pre-processed blif and do cleanup and recover
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system("/bin/csh -cx './$abc_bb_name -c \"read $interm_blif; $abc_seq_optimize sweep; write_hie $interm_blif $blif_out; quit;\" > $log'");
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system("./$abc_bb_name -c \"read $interm_blif; $abc_seq_optimize sweep; write_hie $interm_blif $blif_out; quit;\" > $log");
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if (!(-e $blif_out)) {
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die "ERROR: Fail ABC_mccl_FPGA_mapping for benchmark $bm.\n";
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@ -861,19 +861,19 @@ sub run_abc_mig_mccl_fpgamap($ $ $)
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# Run ABC three times:
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# 1st time: run abc_with_mig_mccl: read the $bm and do carry-chain detection
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# TODO: unfinished!!!!
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system("/bin/csh -cx './$abc_mig_mccl_name -c \"readv $bm; chains -C ; quit;\" > $log.ccdetect'");
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system("./$abc_mig_mccl_name -c \"readv $bm; chains -C ; quit;\" > $log.ccdetect");
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# Repeat chdir for multi-thread supporting!
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chdir $abc_mccl_dir;
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print "INFO: entering abc_mccl directory: $abc_mccl_dir \n";
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# 2nd time: run abc_with_mccl: read the $fadds_blif and do carry-chain LUT premapping
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system("/bin/csh -cx './$abc_mccl_name -c \"read $fadds_blif; resyn; resyn2; mccl -A $mccl_opt_A -B $mccl_opt_B -S $mccl_opt_S -K $lut_num -O 1 -r -o $interm_blif; quit;\" > $log.mccl'");
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system("./$abc_mccl_name -c \"read $fadds_blif; resyn; resyn2; mccl -A $mccl_opt_A -B $mccl_opt_B -S $mccl_opt_S -K $lut_num -O 1 -r -o $interm_blif; quit;\" > $log.mccl");
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chdir $abc_bb_dir;
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print "INFO: entering abc_with_bb_support directory: $abc_bb_dir \n";
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# 3rd time: run abc_with_bb_support: read the pre-processed blif and do cleanup and recover
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system("/bin/csh -cx './$abc_bb_name -c \"read $interm_blif; $abc_seq_optimize sweep; write_hie $interm_blif $blif_out; quit;\" > $log'");
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system("./$abc_bb_name -c \"read $interm_blif; $abc_seq_optimize sweep; write_hie $interm_blif $blif_out; quit;\" > $log");
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if (!(-e $blif_out)) {
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die "ERROR: Fail ABC_mccl_FPGA_mapping for benchmark $bm.\n";
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@ -889,7 +889,7 @@ sub run_mpack1p5($ $ $ $ $)
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my ($mpack1_dir,$mpack1_name) = &split_prog_path($conf_ptr->{dir_path}->{mpack1_path}->{val});
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chdir $mpack1_dir;
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# Run MPACK
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system("/bin/csh -cx './$mpack1_name $blif_in $blif_prefix -matrix_depth $matrix_size -matrix_width $matrix_size -cell_size $cell_size > $log'");
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system("./$mpack1_name $blif_in $blif_prefix -matrix_depth $matrix_size -matrix_width $matrix_size -cell_size $cell_size > $log");
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chdir $cwd;
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}
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@ -902,7 +902,7 @@ sub run_mpack2($ $ $ $ $ $ $)
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chdir $mpack2_dir;
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#my ($ble_arch) = ($conf_ptr->{flow_conf}->{mpack_ble_arch}->{val});
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# Run MPACK
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system("/bin/csh -cx './$mpack2_name -blif $blif_in -mpack_blif $blif_out -net $net -ble_arch $mpack2_arch -stats $stats -vpr_arch $vpr_arch > $log'");
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system("./$mpack2_name -blif $blif_in -mpack_blif $blif_out -net $net -ble_arch $mpack2_arch -stats $stats -vpr_arch $vpr_arch > $log");
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chdir $cwd;
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}
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@ -1170,7 +1170,7 @@ sub run_odin2($ $ $) {
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}
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chdir $odin2_dir;
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system("/bin/csh -cx './$odin2_name -c $config_xml $options > $log'");
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system("./$odin2_name -c $config_xml $options > $log");
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chdir $cwd;
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}
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@ -1205,7 +1205,7 @@ sub run_ace($ $ $ $) {
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print "Entering $ace_dir\n";
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chdir $ace_dir;
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system("/bin/csh -cx './$ace_name -b $mpack_vpr_blif -o $act_file -n $ace_new_blif $ace_customized_opts > $log'");
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system("./$ace_name -b $mpack_vpr_blif -o $act_file -n $ace_new_blif $ace_customized_opts > $log");
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if (!(-e $ace_new_blif)) {
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die "ERROR: Fail ACE for benchmark $mpack_vpr_blif.\n";
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@ -1352,7 +1352,7 @@ sub run_std_vpr($ $ $ $ $ $ $ $ $)
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$other_opt .= "--max_router_iterations $opt_ptr->{vpr_max_router_iteration_val} ";
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}
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system("/bin/csh -cx './$vpr_name $arch $blif --net_file $net --place_file $place --route_file $route --full_stats --nodisp $power_opts $packer_opts $chan_width_opt $vpr_spice_opts $other_opt > $log'");
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system("./$vpr_name $arch $blif --net_file $net --place_file $place --route_file $route --full_stats --nodisp $power_opts $packer_opts $chan_width_opt $vpr_spice_opts $other_opt > $log");
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chdir $cwd;
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}
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@ -1415,7 +1415,7 @@ sub run_vpr_route($ $ $ $ $ $ $ $ $)
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$other_opt .= "--router_algorithm breadth_first ";
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}
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system("/bin/csh -cx './$vpr_name $arch $blif --route --blif_file $blif --net_file $net --place_file $place --route_file $route --full_stats --nodisp $power_opts $chan_width_opt $vpr_spice_opts $other_opt > $log'");
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system("./$vpr_name $arch $blif --route --blif_file $blif --net_file $net --place_file $place --route_file $route --full_stats --nodisp $power_opts $chan_width_opt $vpr_spice_opts $other_opt > $log");
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chdir $cwd;
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}
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@ -1429,7 +1429,7 @@ sub run_mpack1_vpr($ $ $ $ $ $ $)
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$power_opts = "--power --activity_file $act_file --tech_properties $conf_ptr->{flow_conf}->{power_tech_xml}->{val}";
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}
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chdir $vpr_dir;
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system("/bin/csh -cx './$vpr_name $arch $blif --net_file $net --place_file $place --route_file $route --place --route --full_stats --nodisp $power_opts > $log'");
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system("./$vpr_name $arch $blif --net_file $net --place_file $place --route_file $route --place --route --full_stats --nodisp $power_opts > $log");
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chdir $cwd;
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}
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@ -1452,7 +1452,7 @@ sub run_mpack2_vpr($ $ $ $ $ $ $)
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}
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chdir $vpr_dir;
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system("/bin/csh -cx './$vpr_name $arch $blif --net_file $net --place_file $place --route_file $route --place --route --full_stats --nodisp $power_opts $chan_width_opt > $log'");
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system("./$vpr_name $arch $blif --net_file $net --place_file $place --route_file $route --place --route --full_stats --nodisp $power_opts $chan_width_opt > $log");
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chdir $cwd;
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}
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@ -1464,7 +1464,7 @@ sub run_aapack($ $ $ $)
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chdir $vpr_dir;
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system("/bin/csh -cx './$vpr_name $arch $blif --net_file $net --pack --timing_analysis off --nodisp > $aapack_log'");
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system("./$vpr_name $arch $blif --net_file $net --pack --timing_analysis off --nodisp > $aapack_log");
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chdir $cwd;
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}
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@ -1476,7 +1476,7 @@ sub run_m2net_pack_arch($ $ $ $ $ $)
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chdir $m2net_dir;
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system("/bin/csh -cx 'perl $m2net_name -conf $m2net_conf -mpack1_rpt $mpack1_rpt -mode pack_arch -N $N -I $I -arch_file_pack $pack_arch > $m2net_pack_arch_log'");
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system("perl $m2net_name -conf $m2net_conf -mpack1_rpt $mpack1_rpt -mode pack_arch -N $N -I $I -arch_file_pack $pack_arch > $m2net_pack_arch_log");
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chdir $cwd;
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}
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@ -1494,7 +1494,7 @@ sub run_m2net_m2net($ $ $ $ $)
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$power_opt = "-power";
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}
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system("/bin/csh -cx 'perl $m2net_name -conf $m2net_conf -mpack1_rpt $mpack1_rpt -mode m2net -N $N -I $I -net_file_in $aapack_net -net_file_out $vpr_net -arch_file_vpr $vpr_arch $power_opt > $m2net_m2net_log'");
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system("perl $m2net_name -conf $m2net_conf -mpack1_rpt $mpack1_rpt -mode m2net -N $N -I $I -net_file_in $aapack_net -net_file_out $vpr_net -arch_file_vpr $vpr_arch $power_opt > $m2net_m2net_log");
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chdir $cwd;
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}
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@ -1536,7 +1536,7 @@ sub run_cirkit_mig_mccl_map($ $ $) {
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# Run ABC to rewrite blif to AIG in verilog format
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chdir $abc_dir;
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system("/bin/csh -cx './$abc_name -F $abc_cmd_log > $log'");
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system("./$abc_name -F $abc_cmd_log > $log");
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if (!(-e $bm_aig)) {
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die "ERROR: Fail ABC for benchmark $bm.\n";
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}
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@ -1553,7 +1553,7 @@ sub run_cirkit_mig_mccl_map($ $ $) {
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chdir $cirkit_dir;
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# Run FPGA ABC
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system("/bin/csh -cx './$cirkit_name -f $cirkit_cmd_log >> $log'");
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system("./$cirkit_name -f $cirkit_cmd_log >> $log");
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if (!(-e $blif_out)) {
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die "ERROR: Fail Cirkit for benchmark $bm.\n";
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