From 82c010593dc1143264fafff3a003770d3d11f5c1 Mon Sep 17 00:00:00 2001
From: Duck Deux <duck2@protonmail.com>
Date: Thu, 31 Oct 2024 01:48:24 -0700
Subject: [PATCH] fix formatting

---
 openfpga/src/fpga_bitstream/build_routing_bitstream.cpp | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/openfpga/src/fpga_bitstream/build_routing_bitstream.cpp b/openfpga/src/fpga_bitstream/build_routing_bitstream.cpp
index 6b16e7e28..3f6dcc6bb 100644
--- a/openfpga/src/fpga_bitstream/build_routing_bitstream.cpp
+++ b/openfpga/src/fpga_bitstream/build_routing_bitstream.cpp
@@ -87,7 +87,8 @@ static void build_switch_block_mux_bitstream(
         break;
       }
     }
-  } else if (false == circuit_lib.mux_add_const_input(mux_model) && prefer_unused_mux_input) {
+  } else if (false == circuit_lib.mux_add_const_input(mux_model) &&
+             prefer_unused_mux_input) {
     /* If
      * 1. output net is INVALID (unmapped)
      * 2. and we don't have a constant input,
@@ -102,7 +103,7 @@ static void build_switch_block_mux_bitstream(
     /* Warn if all inputs were mapped */
     if (path_id == DEFAULT_PATH_ID) {
       VTR_LOGV_WARN(
-        verbose, 
+        verbose,
         "At RRNodeId = %d: output is unmapped but all inputs are mapped?",
         cur_rr_node);
     }
@@ -342,7 +343,7 @@ static void build_connection_block_mux_bitstream(
       RREdgeId edge = driver_rr_edges[iedge];
       RRNodeId driver_node = rr_graph.edge_src_node(edge);
       if (routing_annotation.rr_node_net(driver_node) ==
-          ClusterNetId::INVALID()){
+          ClusterNetId::INVALID()) {
         path_id = iedge;
         break;
       }