Merge pull request #49 from RapidSilicon/update_from_upstream

Pulling refs/heads/update_from_upstream into master

.github/dependabot.yml

@@ -17,5 +17,7 @@ updates:
     # Allow dependabot to open up to 10 open pull requests. Default is 5.
     # open-pull-requests-limit: 10
     allow:
-      # only enable for the yosys-symbiflow-plugins submodule
+      # Enable for the yosys-symbiflow-plugins submodule
       - dependency-name: "yosys-plugins"
+      # Enable for the yosys submodule
+      - dependency-name: "yosys"

.github/workflows/build.yml

@@ -30,6 +30,11 @@ jobs:
       sha_short: ${{ steps.changes.outputs.sha_short }}
       docker_repo: ${{ steps.changes.outputs.docker_repo }}
     steps:
+      - name: Cancel previous
+        uses: styfle/cancel-workflow-action@0.9.1
+        with:
+          access_token: ${{ github.token }}
+          
       - name: Checkout OpenFPGA repo
         uses: actions/checkout@v2
         with:
@@ -100,6 +105,11 @@ jobs:
       CCACHE_LOGFILE: ccache_log
       CCACHE_DIR: /__w/OpenFPGA/.ccache
     steps:
+      - name: Cancel previous
+        uses: styfle/cancel-workflow-action@0.9.1
+        with:
+          access_token: ${{ github.token }}
+          
       - name: Checkout OpenFPGA repo
         uses: actions/checkout@v2
         with:
@@ -179,6 +189,11 @@ jobs:
     runs-on: ubuntu-latest
     needs: [linux_build, change_detect]
     steps:
+      - name: Cancel previous
+        uses: styfle/cancel-workflow-action@0.9.1
+        with:
+          access_token: ${{ github.token }}
+          
       - name: Checkout OpenFPGA repo
         uses: actions/checkout@v2
       - name: Download a built artifacts
@@ -224,6 +239,11 @@ jobs:
           - name: vtr_benchmark_reg_test
           - name: iwls_benchmark_reg_test
     steps:
+      - name: Cancel previous
+        uses: styfle/cancel-workflow-action@0.9.1
+        with:
+          access_token: ${{ github.token }}
+    
       - name: Checkout OpenFPGA repo
         uses: actions/checkout@v2
       - name: Download a built artifacts
@@ -272,6 +292,11 @@ jobs:
           - name: vtr_benchmark_reg_test
           - name: iwls_benchmark_reg_test
     steps:
+      - name: Cancel previous
+        uses: styfle/cancel-workflow-action@0.9.1
+        with:
+          access_token: ${{ github.token }}
+          
       - name: Checkout OpenFPGA repo
         uses: actions/checkout@v2
         with:

.github/workflows/patch_updater.yml

@@ -0,0 +1,56 @@
+name: Count Patches
+on:
+  workflow_dispatch:
+  schedule:
+    - cron: '0 0 * * *'
+
+env:
+  TAG_COMMIT: 49a8273..
+  BRANCH_NAME: patch_update
+
+jobs:
+  patch-count:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout
+        uses: actions/checkout@v2
+        with:
+          fetch-depth: 0
+
+      - name: Get latest commit
+        id: log
+        run: echo "::set-output name=message::$(git log --no-merges -1 --oneline)"
+
+      - name: Get repo name
+        id: repo
+        run: echo "::set-output name=message::$GITHUB_REPOSITORY"
+
+      - name: Insert Patch Count
+        if: "!contains(steps.log.outputs.message, 'Updated Patch Count') && contains(steps.repo.outputs.message, 'lnis-uofu/OpenFPGA')"
+        run: |
+          sed -i "/^set(OPENFPGA_VERSION_PATCH /s/[0-9]*)/`git log ${TAG_COMMIT}  --oneline | wc -l`)/" CMakeLists.txt
+          git config --local user.email "41898282+github-actions[bot]@users.noreply.github.com"
+          git config --local user.name "github-actions[bot]"
+          git add CMakeLists.txt
+          git commit -m "Updated Patch Count"
+
+      - name: Push changes # push the output folder to your repo
+        if: "!contains(steps.log.outputs.message, 'Updated Patch Count') && contains(steps.repo.outputs.message, 'lnis-uofu/OpenFPGA')"
+        uses: ad-m/github-push-action@master
+        with:
+          github_token: ${{ secrets.GITHUB_TOKEN }}
+          branch: ${{env.BRANCH_NAME}}
+
+      - name: Create Auto PR
+        if: "!contains(steps.log.outputs.message, 'Updated Patch Count') && contains(steps.repo.outputs.message, 'lnis-uofu/OpenFPGA')"
+        uses: repo-sync/pull-request@v2
+        with:
+          source_branch: ${{env.BRANCH_NAME}}           # name of branch for PR
+          destination_branch: "master"                      # name of branch on which PR go
+          pr_title: "Pulling ${{ github.ref }} into master" # Title of pull request
+          pr_body: ":crown: *An automated PR*"              # Full markdown support, requires pr_title
+          pr_reviewer: "tangxifan"                          # Comma-separated list (no spaces)
+          pr_assignee: "nadeemyaseen-rs"                    # Comma-separated list (no spaces)
+          pr_label: "auto-pr"                               # Comma-separated list (no spaces)
+          pr_allow_empty: true                              # Creates pull request even if there are no changes
+          github_token: ${{ secrets.GITHUB_TOKEN }}

CMakeLists.txt

@@ -53,7 +53,7 @@ set_property(CACHE VPR_USE_EZGL PROPERTY STRINGS auto off on)
 # Version number
 set(OPENFPGA_VERSION_MAJOR 1)
 set(OPENFPGA_VERSION_MINOR 0)
-set(OPENFPGA_VERSION_PATCH 0)
+set(OPENFPGA_VERSION_PATCH 3410)
 set(OPENFPGA_VERSION_PRERELEASE "dev")
 
 # Include user-defined functions

openfpga/src/fpga_bitstream/build_grid_bitstream.cpp

@@ -91,6 +91,23 @@ void build_primitive_bitstream(BitstreamManager& bitstream_manager,
   std::vector<bool> mode_select_bitstream;
   if (true == physical_pb.valid_pb_id(primitive_pb_id)) {
     mode_select_bitstream = generate_mode_select_bitstream(physical_pb.mode_bits(primitive_pb_id));
+    /* If the physical pb contains fixed mode-select bitstream, overload here */
+    if (false == physical_pb.fixed_mode_select_bitstream(primitive_pb_id).empty()) {
+      std::string fixed_mode_select_bitstream = physical_pb.fixed_mode_select_bitstream(primitive_pb_id);
+      size_t mode_bits_start_index = physical_pb.fixed_mode_select_bitstream_offset(primitive_pb_id);
+      /* Ensure the length matches!!! */
+      if (mode_select_bitstream.size() - mode_bits_start_index < fixed_mode_select_bitstream.size()) {
+        VTR_LOG_ERROR("Unmatched length of fixed mode_select_bitstream %s!Expected to be less than %ld bits\n",
+                      fixed_mode_select_bitstream.c_str(),
+                      mode_select_bitstream.size() - mode_bits_start_index);
+        exit(1);
+      }
+      /* Overload the bitstream here */
+      for (size_t bit_index = 0; bit_index < fixed_mode_select_bitstream.size(); ++bit_index) {
+        VTR_ASSERT('0' == fixed_mode_select_bitstream[bit_index] || '1' == fixed_mode_select_bitstream[bit_index]);
+        mode_select_bitstream[bit_index + mode_bits_start_index] = ('1' == fixed_mode_select_bitstream[bit_index]);
+      }
+    }
   } else { /* get default mode_bits */
     mode_select_bitstream = generate_mode_select_bitstream(device_annotation.pb_type_mode_bits(primitive_pb_type));
   }