From 8067a133466a6a1ea890188e12942d8f45d49383 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Fri, 3 Jul 2020 15:56:20 -0600 Subject: [PATCH] bug fix for memory bank due to encoding bl/wl addresses in fabric bitstream --- openfpga/src/fpga_bitstream/build_fabric_bitstream.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openfpga/src/fpga_bitstream/build_fabric_bitstream.cpp b/openfpga/src/fpga_bitstream/build_fabric_bitstream.cpp index b960d188a..05e93d22a 100644 --- a/openfpga/src/fpga_bitstream/build_fabric_bitstream.cpp +++ b/openfpga/src/fpga_bitstream/build_fabric_bitstream.cpp @@ -425,8 +425,8 @@ void build_module_fabric_dependent_bitstream(const ConfigProtocol& config_protoc /* Reserve bits before build-up */ fabric_bitstream.set_use_address(true); fabric_bitstream.set_use_wl_address(true); - fabric_bitstream.set_bl_address_length(bl_port_info.get_width()); - fabric_bitstream.set_wl_address_length(wl_port_info.get_width()); + fabric_bitstream.set_bl_address_length(bl_addr_port_info.get_width()); + fabric_bitstream.set_wl_address_length(wl_addr_port_info.get_width()); fabric_bitstream.reserve_bits(bitstream_manager.num_bits()); rec_build_module_fabric_dependent_memory_bank_bitstream(bitstream_manager, top_block,