From 7fcaecd0f514074859307e758f31ecb26b7f4137 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Mon, 26 Sep 2022 21:06:51 -0700 Subject: [PATCH] [script] enable abc build in vtr because we need ace2 --- CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 95d5b73c5..73b0eccb5 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -69,7 +69,7 @@ option(OPENFPGA_WITH_YOSYS_PLUGIN "Enable building Yosys plugin" ON) option(OPENFPGA_WITH_TEST "Enable testing build for codebase. Once enabled, make test can be run" ON) # Options pass on to VTR -set(WITH_ABC OFF CACHE BOOL "Enable building ABC in Verilog-to-Routing") +set(WITH_ABC ON CACHE BOOL "Enable building ABC in Verilog-to-Routing") set(WITH_ODIN OFF CACHE BOOL "Enable building Odin in Verilog-to-Routing") set(ODIN_DEBUG OFF CACHE BOOL "Enable building odin with debug flags in Verilog-to-Routing") set(ODIN_WARN OFF CACHE BOOL "Enable building odin with extra warning flags in Verilog-to-Routing")