[lib] added tests for pcf2place
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@ -33,6 +33,34 @@ size_t IoLocationMap::io_index(const size_t& x,
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return result->second.get_lsb();
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}
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size_t IoLocationMap::io_x(const BasicPort& io_port) const {
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for (auto pair : io_indices_) {
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if (pair.second == io_port) {
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return pair.first[0];
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}
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}
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return size_t(-1);
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}
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size_t IoLocationMap::io_y(const BasicPort& io_port) const {
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for (auto pair : io_indices_) {
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if (pair.second == io_port) {
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return pair.first[1];
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}
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}
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return size_t(-1);
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}
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size_t IoLocationMap::io_z(const BasicPort& io_port) const {
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for (auto pair : io_indices_) {
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if (pair.second == io_port) {
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return pair.first[2];
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}
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}
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return size_t(-1);
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}
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void IoLocationMap::set_io_index(const size_t& x,
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const size_t& y,
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const size_t& z,
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@ -0,0 +1,65 @@
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/********************************************************************
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* Unit test functions to validate the correctness of
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* 1. parser of data structures
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* 2. writer of data structures
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*******************************************************************/
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/* Headers from vtrutils */
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#include "vtr_assert.h"
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#include "vtr_log.h"
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/* Headers from fabric key */
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#include "pcf_reader.h"
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#include "blif_head_reader.h"
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#include "read_csv_io_pin_table.h"
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#include "read_xml_io_location_map.h"
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#include "io_net_place.h"
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#include "pcf2place.h"
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int main(int argc, const char** argv) {
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/* Ensure we have the following arguments:
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* 1. Input - Users Design Constraints (.pcf)
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* 2. Input - Netlist (.blif)
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* 3. Input - Fabic I/O location map (.xml)
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* 4. Input - Chip pin table (.csv)
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* 5. Output - I/O placement (.place)
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*/
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VTR_ASSERT(6 == argc);
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/* Parse the input files */
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openfpga::PcfData pcf_data;
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openfpga::read_pcf(argv[1], pcf_data);
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VTR_LOG("Read the design constraints from a pcf file: %s.\n",
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argv[1]);
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blifparse::BlifHeadReader callback;
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blifparse::blif_parse_filename(argv[2], callback);
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VTR_LOG("Read the blif from a file: %s.\n",
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argv[2]);
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if (callback.had_error()) {
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VTR_LOG("Read the blif ends with errors\n",
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argv[2]);
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return 1;
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}
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openfpga::IoLocationMap io_location_map = openfpga::read_xml_io_location_map(argv[3]);
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VTR_LOG("Read the I/O location map from an XML file: %s.\n",
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argv[3]);
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openfpga::IoPinTable io_pin_table = openfpga::read_csv_io_pin_table(argv[4]);
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VTR_LOG("Read the I/O pin table from a csv file: %s.\n",
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argv[4]);
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/* Convert */
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openfpga::IoNetPlace io_net_place;
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int status = pcf2place(pcf_data, callback.input_pins(), callback.output_pins(), io_pin_table, io_location_map, io_net_place);
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if (status) {
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return status;
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}
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/* Output */
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status = io_net_place.write_to_place_file(argv[5], true, true);
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return status;
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}
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