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[test] fixed a bug in arch

This commit is contained in:
tangxifan 2023-03-06 23:06:32 -08:00
parent 550e68c68b
commit 7e3b656c51
1 changed files with 2 additions and 2 deletions
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4
openfpga_flow/vpr_arch/k4_N4_tileable_Ntwk1clk2lvl_40nm.xml
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@ -64,9 +64,9 @@
<fc_override port_name="clk" fc_type="frac" fc_val="0"/>
</fc>
<pinlocations pattern="custom">
<loc side="left">clb.clk</loc>
<loc side="left"></loc>
<loc side="top">clb.I[0:4] clb.O[0:1]</loc>
<loc side="right">clb.I[5:9] clb.O[2:3]</loc>
<loc side="right">clb.I[5:9] clb.O[2:3] clb.clk</loc>
<loc side="bottom"/>
</pinlocations>
</sub_tile>