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[Benchmark] Bug fix in dual port ram 16k benchmark

This commit is contained in:
tangxifan 2021-04-27 23:33:20 -06:00
parent 3c1c33bf1e
commit 7d059f7407
1 changed files with 6 additions and 6 deletions
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12
openfpga_flow/benchmarks/micro_benchmark/dual_port_ram_16k/dual_port_ram_16k.v
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@ -1,16 +1,16 @@
//----------------------------------------------------- //-----------------------------------------------------
// Design Name : dual_port_ram_16k // Design Name : dual_port_ram_16k
// File Name : dpram.v // File Name : dual_port_ram_16k.v
// Function : Dual port RAM 2048x8bit // Function : Dual port RAM 2048x8bit
// Coder : Aurelien // Coder : Xifan Tang
//----------------------------------------------------- //-----------------------------------------------------
module dual_port_ram_16k ( module dual_port_ram_16k (
input clk, input clk,
input wen, input wen,
input ren, input ren,
input [11:0] waddr, input [10:0] waddr,
input [11:0] raddr, input [10:0] raddr,
input [7:0] din, input [7:0] din,
output [7:0] dout output [7:0] dout
); );
@ -30,11 +30,11 @@ endmodule
module dual_port_sram_16kb ( module dual_port_sram_16kb (
input wclk, input wclk,
input wen, input wen,
input [11:0] waddr, input [10:0] waddr,
input [7:0] data_in, input [7:0] data_in,
input rclk, input rclk,
input ren, input ren,
input [11:0] raddr, input [10:0] raddr,
output [7:0] data_out output [7:0] data_out
); );