diff --git a/libs/libopenfpgacapnproto/gen/unique_blocks_uxsdcxx.capnp b/libs/libopenfpgacapnproto/gen/unique_blocks_uxsdcxx.capnp
index 36d23bce7..8e21ea1d7 100644
--- a/libs/libopenfpgacapnproto/gen/unique_blocks_uxsdcxx.capnp
+++ b/libs/libopenfpgacapnproto/gen/unique_blocks_uxsdcxx.capnp
@@ -6,7 +6,7 @@
 # Input file: /home/xifan/github/OpenFPGA/libs/libopenfpgacapnproto/gen/unique_blocks.xsd
 # md5sum of input file: 1db9d740309076fa51f61413bae1e072
 
-@0xb1073886de13324f;
+@0xdae3749fdf603d4b;
 using Cxx = import "/capnp/c++.capnp";
 $Cxx.namespace("ucap");
 
diff --git a/openfpga/src/annotation/annotate_rr_graph.cpp b/openfpga/src/annotation/annotate_rr_graph.cpp
index 79b0db633..0fffdb979 100644
--- a/openfpga/src/annotation/annotate_rr_graph.cpp
+++ b/openfpga/src/annotation/annotate_rr_graph.cpp
@@ -686,8 +686,8 @@ static void annotate_direct_circuit_models(
   VprDeviceAnnotation& vpr_device_annotation, const bool& verbose_output) {
   size_t count = 0;
 
-  for (int idirect = 0; idirect < vpr_device_ctx.arch->num_directs; ++idirect) {
-    std::string direct_name = vpr_device_ctx.arch->Directs[idirect].name;
+  for (size_t idirect = 0; idirect < vpr_device_ctx.arch->directs.size(); ++idirect) {
+    std::string direct_name = vpr_device_ctx.arch->directs[idirect].name;
     /* The name-to-circuit mapping is stored in either cb_switch-to-circuit or
      * sb_switch-to-circuit, Try to find one and update the device annotation
      */
diff --git a/openfpga/src/tile_direct/build_tile_direct.cpp b/openfpga/src/tile_direct/build_tile_direct.cpp
index 39cd6ce44..c8e6f7d64 100644
--- a/openfpga/src/tile_direct/build_tile_direct.cpp
+++ b/openfpga/src/tile_direct/build_tile_direct.cpp
@@ -794,28 +794,28 @@ TileDirect build_device_tile_direct(const DeviceContext& device_ctx,
   TileDirect tile_direct;
 
   /* Walk through each direct definition in the VPR arch */
-  for (int idirect = 0; idirect < device_ctx.arch->num_directs; ++idirect) {
+  for (size_t idirect = 0; idirect < device_ctx.arch->directs.size(); ++idirect) {
     ArchDirectId arch_direct_id =
-      arch_direct.direct(std::string(device_ctx.arch->Directs[idirect].name));
+      arch_direct.direct(std::string(device_ctx.arch->directs[idirect].name));
     if (ArchDirectId::INVALID() == arch_direct_id) {
       VTR_LOG_ERROR(
         "Unable to find an annotation in openfpga architecture XML for "
         "<direct> '%s'!\n",
-        device_ctx.arch->Directs[idirect].name);
+        device_ctx.arch->directs[idirect].name.c_str());
       exit(1);
     }
     /* Build from original VPR arch definition */
     if (e_direct_type::INNER_COLUMN_OR_ROW ==
         arch_direct.type(arch_direct_id)) {
       build_inner_column_row_tile_direct(tile_direct,
-                                         device_ctx.arch->Directs[idirect],
+                                         device_ctx.arch->directs[idirect],
                                          device_ctx, arch_direct_id, verbose);
       /* Skip those direct connections which belong part of a connection block
        */
     }
     /* Build from OpenFPGA arch definition */
     build_inter_column_row_tile_direct(
-      tile_direct, device_ctx.arch->Directs[idirect], device_ctx, arch_direct,
+      tile_direct, device_ctx.arch->directs[idirect], device_ctx, arch_direct,
       arch_direct_id, verbose);
   }