add write_gsb command to shell interface

openfpga/src/annotation/write_xml_device_rr_gsb.cpp

@@ -24,14 +24,17 @@ namespace openfpga {
 static 
 void write_rr_switch_block_to_xml(const std::string fname_prefix,
                                   const RRGraph& rr_graph,
-                                  const RRGSB& rr_gsb) {
+                                  const RRGSB& rr_gsb,
+                                  const bool& verbose) {
   /* Prepare file name */
   std::string fname(fname_prefix);
   vtr::Point<size_t> gsb_coordinate(rr_gsb.get_sb_x(), rr_gsb.get_sb_y());
   fname += generate_switch_block_module_name(gsb_coordinate);
   fname += ".xml";
 
-  VTR_LOG("Output internal structure of Switch Block to '%s'\r", fname.c_str());
+  VTR_LOGV(verbose,
+           "Output internal structure of Switch Block to '%s'\n",
+           fname.c_str());
 
   /* Create a file handler*/
   std::fstream fp;
@@ -173,18 +176,29 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
  ***************************************************************************************/
 void write_device_rr_gsb_to_xml(const char* sb_xml_dir, 
                                 const RRGraph& rr_graph,
-                                const DeviceRRGSB& device_rr_gsb) {
+                                const DeviceRRGSB& device_rr_gsb,
-  std::string fname_prefix = format_dir_path(std::string(sb_xml_dir));
+                                const bool& verbose) {
+  std::string xml_dir_name = format_dir_path(std::string(sb_xml_dir));
+
+  /* Create directories */
+  create_dir_path(xml_dir_name.c_str());
 
   vtr::Point<size_t> sb_range = device_rr_gsb.get_gsb_range();
 
+  size_t gsb_counter = 0;
+
   /* For each switch block, an XML file will be outputted */
   for (size_t ix = 0; ix < sb_range.x(); ++ix) {
     for (size_t iy = 0; iy < sb_range.y(); ++iy) {
       const RRGSB& rr_gsb = device_rr_gsb.get_gsb(ix, iy);
-      write_rr_switch_block_to_xml(fname_prefix, rr_graph, rr_gsb);
+      write_rr_switch_block_to_xml(xml_dir_name, rr_graph, rr_gsb, verbose);
+      gsb_counter++;
     }
   }
+
+  VTR_LOG("Output %lu XML files to directory '%s'\n",
+          gsb_counter,
+          xml_dir_name.c_str());
 }
 
 } /* end namespace openfpga */

openfpga/src/annotation/write_xml_device_rr_gsb.h

@@ -17,7 +17,8 @@ namespace openfpga {
 
 void write_device_rr_gsb_to_xml(const char* sb_xml_dir,
                                 const RRGraph& rr_graph,
-                                const DeviceRRGSB& device_rr_gsb);
+                                const DeviceRRGSB& device_rr_gsb,
+                                const bool& verbose);
 
 } /* end namespace openfpga */
 

openfpga/src/base/openfpga_setup_command.cpp

@@ -9,6 +9,7 @@
 #include "openfpga_lut_truth_table_fixup.h"
 #include "check_netlist_naming_conflict.h"
 #include "openfpga_build_fabric.h"
+#include "openfpga_write_gsb.h"
 #include "openfpga_setup_command.h"
 
 /* begin namespace openfpga */
@@ -95,6 +96,35 @@ ShellCommandId add_openfpga_link_arch_command(openfpga::Shell<OpenfpgaContext>&
   return shell_cmd_id;
 }
 
+/********************************************************************
+ * - Add a command to Shell environment: write_gsb_to_xml
+ * - Add associated options 
+ * - Add command dependency
+ *******************************************************************/
+static 
+ShellCommandId add_openfpga_write_gsb_command(openfpga::Shell<OpenfpgaContext>& shell,
+                                              const ShellCommandClassId& cmd_class_id,
+                                              const std::vector<ShellCommandId>& dependent_cmds) {
+  Command shell_cmd("write_gsb_to_xml");
+  /* Add an option '--file' in short '-f'*/
+  CommandOptionId opt_file = shell_cmd.add_option("file", true, "path to the directory that stores the XML files");
+  shell_cmd.set_option_short_name(opt_file, "f");
+  shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING);
+
+  /* Add an option '--verbose' */
+  shell_cmd.add_option("verbose", false, "Show verbose outputs");
+
+  /* Add command 'write_openfpga_arch' to the Shell */
+  ShellCommandId shell_cmd_id = shell.add_command(shell_cmd, "write internal structures of General Switch Blocks to XML file");
+  shell.set_command_class(shell_cmd_id, cmd_class_id);
+  shell.set_command_const_execute_function(shell_cmd_id, write_gsb);
+
+  /* Add command dependency to the Shell */
+  shell.set_command_dependency(shell_cmd_id, dependent_cmds);
+
+  return shell_cmd_id;
+}
+
 /********************************************************************
  * - Add a command to Shell environment: check_netlist_naming_conflict
  * - Add associated options 
@@ -240,6 +270,16 @@ void add_openfpga_setup_commands(openfpga::Shell<OpenfpgaContext>& shell) {
   ShellCommandId link_arch_cmd_id = add_openfpga_link_arch_command(shell,
                                                                    openfpga_setup_cmd_class,
                                                                    link_arch_dependent_cmds);
+  /******************************** 
+   * Command 'write_gsb' 
+   */
+  /* The 'write_gsb' command should NOT be executed before 'link_openfpga_arch' */
+  std::vector<ShellCommandId> write_gsb_dependent_cmds;
+  write_gsb_dependent_cmds.push_back(link_arch_cmd_id);
+  add_openfpga_write_gsb_command(shell,
+                                 openfpga_setup_cmd_class,
+                                 write_gsb_dependent_cmds);
+
   /******************************************* 
    * Command 'check_netlist_naming_conflict'
    */ 

openfpga/src/base/openfpga_write_gsb.cpp

@@ -0,0 +1,43 @@
+/********************************************************************
+ * This file includes functions to compress the hierachy of routing architecture
+ *******************************************************************/
+/* Headers from vtrutil library */
+#include "vtr_time.h"
+#include "vtr_log.h"
+
+#include "write_xml_device_rr_gsb.h"
+
+#include "openfpga_write_gsb.h"
+
+/* Include global variables of VPR */
+#include "globals.h"
+
+/* begin namespace openfpga */
+namespace openfpga {
+
+/********************************************************************
+ * Write internal structrure of all the General Switch Blocks (GSBs)
+ * to an XML file 
+ *******************************************************************/
+void write_gsb(const OpenfpgaContext& openfpga_ctx,
+               const Command& cmd, const CommandContext& cmd_context) { 
+
+  /* Check the option '--file' is enabled or not 
+   * Actually, it must be enabled as the shell interface will check 
+   * before reaching this fuction
+   */
+  CommandOptionId opt_file = cmd.option("file");
+  VTR_ASSERT(true == cmd_context.option_enable(cmd, opt_file));
+  VTR_ASSERT(false == cmd_context.option_value(cmd, opt_file).empty());
+
+  CommandOptionId opt_verbose = cmd.option("verbose");
+
+  std::string sb_file_name = cmd_context.option_value(cmd, opt_file);
+
+  write_device_rr_gsb_to_xml(sb_file_name.c_str(),
+                             g_vpr_ctx.device().rr_graph,
+                             openfpga_ctx.device_rr_gsb(),
+                             cmd_context.option_enable(cmd, opt_verbose));
+} 
+
+} /* end namespace openfpga */

openfpga/src/base/openfpga_write_gsb.h

@@ -0,0 +1,23 @@
+#ifndef OPENFPGA_WRITE_GSB_H
+#define OPENFPGA_WRITE_GSB_H
+
+/********************************************************************
+ * Include header files that are required by function declaration
+ *******************************************************************/
+#include "command.h"
+#include "command_context.h"
+#include "openfpga_context.h"
+
+/********************************************************************
+ * Function declaration
+ *******************************************************************/
+
+/* begin namespace openfpga */
+namespace openfpga {
+
+void write_gsb(const OpenfpgaContext& openfpga_ctx,
+               const Command& cmd, const CommandContext& cmd_context); 
+
+} /* end namespace openfpga */
+
+#endif

openfpga/src/fabric/build_top_module_directs.cpp

@@ -96,7 +96,9 @@ void add_module_nets_tile_direct_connection(ModuleManager& module_manager,
   std::string src_port_name = generate_grid_port_name(src_clb_coord, src_pin_width, src_pin_height, src_pin_grid_side, src_tile_pin, false);
   ModulePortId src_port_id = module_manager.find_module_port(src_grid_module, src_port_name); 
   if (true != module_manager.valid_module_port_id(src_grid_module, src_port_id)) {
-    VTR_LOG("Fail to find port '%s'\n", src_port_name.c_str());
+    VTR_LOG_ERROR("Fail to find port '%s.%s'\n",
+                  src_module_name.c_str(),
+                  src_port_name.c_str());
   }
   VTR_ASSERT(true == module_manager.valid_module_port_id(src_grid_module, src_port_id));
   VTR_ASSERT(1 == module_manager.module_port(src_grid_module, src_port_id).get_width());

openfpga/test_script/and_k6_frac_adder_chain.openfpga

@@ -10,6 +10,9 @@ read_openfpga_arch -f ./test_openfpga_arch/k6_frac_N10_adder_chain_40nm_openfpga
 # Annotate the OpenFPGA architecture to VPR data base
 link_openfpga_arch --activity_file ./test_blif/and.act --sort_gsb_chan_node_in_edges #--verbose
 
+# Write GSB to XML for debugging
+write_gsb_to_xml --file /var/tmp/xtang/openfpga_test_src/gsb_xml
+
 # Check and correct any naming conflicts in the BLIF netlist
 check_netlist_naming_conflict --fix --report ./netlist_renaming.xml
 
@@ -22,7 +25,7 @@ lut_truth_table_fixup #--verbose
 # Build the module graph 
 #  - Enabled compression on routing architecture modules
 #  - Enable pin duplication on grid modules 
-build_fabric --compress_routing --duplicate_grid_pin --verbose
+build_fabric --compress_routing --duplicate_grid_pin #--verbose
 
 # Repack the netlist to physical pbs
 # This must be done before bitstream generator and testbench generation