From 7a2502ddf9ee99b3710aa1a075a3f08ef52218fb Mon Sep 17 00:00:00 2001 From: tangxifan Date: Wed, 2 Sep 2020 22:47:14 -0600 Subject: [PATCH] [documentation] add more guidelines about the vpr-openfpga architecture annotation --- docs/source/manual/arch_lang/annotate_vpr_arch.rst | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/docs/source/manual/arch_lang/annotate_vpr_arch.rst b/docs/source/manual/arch_lang/annotate_vpr_arch.rst index e2f22ae37..d990e3092 100644 --- a/docs/source/manual/arch_lang/annotate_vpr_arch.rst +++ b/docs/source/manual/arch_lang/annotate_vpr_arch.rst @@ -111,6 +111,8 @@ The ``circuit_model_name`` should match the given name of a ``circuit_model`` de .. note:: This should be applied to primitive ``pb_type``, i.e., ``pb_type`` have no children. + .. note:: This definition should be placed directly under the XML node ```` without any intermediate XML nodes! + - ``name=""`` specifiy the full name of a ``pb_type`` in the hierarchy of VPR architecture. - ``physical_pb_type_name=`` creates the link on ``pb_type`` between operating and physical modes. This syntax is mandatory for every primitive ``pb_type`` in an operating mode ``pb_type``. It should be a valid name of primitive ``pb_type`` in physical mode. @@ -125,10 +127,12 @@ The ``circuit_model_name`` should match the given name of a ``circuit_model`` de .. option:: - - ``name=""`` specifiy the name of a ``interconnect`` in VPR architecture. Different from ``pb_type``, hierarchical name is not required here. + - ``name=""`` specify the name of a ``interconnect`` in VPR architecture. Different from ``pb_type``, hierarchical name is not required here. - ``circuit_model_name=""`` For the interconnection type direct, the type of the linked circuit model should be wire. For multiplexers, the type of linked circuit model should be ``mux``. For complete, the type of the linked circuit model can be either ``mux`` or ``wire``, depending on the case. + .. note:: A ```` parent XML node is required for the interconnect-to-circuit bindings whose interconnects are defined under the ``pb_type`` in VPR architecture description. + .. option::