[doc] add more comments
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@ -39,6 +39,7 @@ An example of the file is shown as follows.
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In this example, the root module is ``fpga_top``.
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The child modules under ``fpga_top`` are ``tile_0__2_`` and ``tile_1__2_``.
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Note that the leaf nodes are shown as a list, e.g., ``GPIO`` and ``GPIO_feedthrough_DFF_mem``.
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When multiple root modules are defined, the output could be
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