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[doc] add more comments

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tangxifan 2024-05-02 22:38:39 -07:00
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docs/source/manual/file_formats/fabric_hierarchy_file.rst
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@ -39,6 +39,7 @@ An example of the file is shown as follows.
In this example, the root module is ``fpga_top``. In this example, the root module is ``fpga_top``.
The child modules under ``fpga_top`` are ``tile_0__2_`` and ``tile_1__2_``. The child modules under ``fpga_top`` are ``tile_0__2_`` and ``tile_1__2_``.
Note that the leaf nodes are shown as a list, e.g., ``GPIO`` and ``GPIO_feedthrough_DFF_mem``.
When multiple root modules are defined, the output could be When multiple root modules are defined, the output could be