diff --git a/openfpga_flow/vpr_arch/k6_frac_N10_tileable_adder_chain_wide_mem16K_40nm.xml b/openfpga_flow/vpr_arch/k6_frac_N10_tileable_adder_chain_wide_mem16K_40nm.xml
index c6f578260..da1d573d5 100644
--- a/openfpga_flow/vpr_arch/k6_frac_N10_tileable_adder_chain_wide_mem16K_40nm.xml
+++ b/openfpga_flow/vpr_arch/k6_frac_N10_tileable_adder_chain_wide_mem16K_40nm.xml
@@ -195,7 +195,7 @@
memory.clk memory.waddr[0:1] memory.raddr[0:1] memory.data_in[0:0] memory.data_out[0:0]
memory.waddr[2:3] memory.raddr[2:3] memory.data_in[1:1] memory.data_out[1:1]
memory.waddr[4:5] memory.raddr[4:5] memory.data_in[2:2] memory.data_out[2:2]
- memory.waddr[6:7] memory.raddr[6:7] memory.data_in[3:3] memory.data_out[3:3]
+ memory.waddr[6:7] memory.raddr[6:7] memory.data_in[3:3] memory.data_out[3:3]
memory.waddr[8:8] memory.raddr[8:8] memory.data_in[4:4] memory.data_out[4:4]
memory.waddr[9:9] memory.raddr[9:9] memory.data_in[5:5] memory.data_out[5:5]
memory.wen memory.waddr[10:10] memory.raddr[10:10] memory.data_in[6:6] memory.data_out[6:6]