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[core] now support perimeter cb in programmable clock network arch

This commit is contained in:
tangxifan 2024-07-07 14:57:05 -07:00
parent 4da5150a26
commit 7996de3fe6
1 changed files with 39 additions and 9 deletions
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48
openfpga/src/annotation/append_clock_rr_graph.cpp
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@ -49,9 +49,16 @@ static size_t estimate_clock_rr_graph_num_nodes(const DeviceGrid& grids,
const bool& through_channel,
const ClockNetwork& clk_ntwk) {
size_t num_nodes = 0;
vtr::Rect<size_t> chanx_bb(1, 0, grids.width() - 1, grids.height() - 1);
if (perimeter_cb) {
chanx_bb.set_xmin(0);
chanx_bb.set_xmax(grids.width());
chanx_bb.set_ymin(0);
chanx_bb.set_ymax(grids.height());
}
/* Check the number of CHANX nodes required */
for (size_t iy = 0; iy < grids.height() - 1; ++iy) {
for (size_t ix = 1; ix < grids.width() - 1; ++ix) {
for (size_t iy = chanx_bb.ymin(); iy < chanx_bb.ymax(); ++iy) {
for (size_t ix = chanx_bb.xmin(); ix < chanx_bb.xmax(); ++ix) {
vtr::Point<size_t> chanx_coord(ix, iy);
/* Bypass if the routing channel does not exist when through channels are
* not allowed */
@ -64,8 +71,16 @@ static size_t estimate_clock_rr_graph_num_nodes(const DeviceGrid& grids,
}
}
for (size_t ix = 0; ix < grids.width() - 1; ++ix) {
for (size_t iy = 1; iy < grids.height() - 1; ++iy) {
vtr::Rect<size_t> chany_bb(0, 1, grids.width() - 1, grids.height() - 1);
if (perimeter_cb) {
chany_bb.set_xmin(0);
chany_bb.set_xmax(grids.width());
chany_bb.set_ymin(0);
chany_bb.set_ymax(grids.height());
}
for (size_t ix = chany_bb.xmin(); ix < chany_bb.xmax(); ++ix) {
for (size_t iy = chany_bb.xmin(); iy < chany_bb.ymax(); ++iy) {
vtr::Point<size_t> chany_coord(ix, iy);
/* Bypass if the routing channel does not exist when through channel are
* not allowed */
@ -159,9 +174,16 @@ static void add_rr_graph_clock_nodes(
clk_ntwk.num_trees(), clk_ntwk.max_tree_depth(),
clk_ntwk.max_tree_width());
vtr::Rect<size_t> chanx_bb(1, 0, grids.width() - 1, grids.height() - 1);
if (perimeter_cb) {
chanx_bb.set_xmin(0);
chanx_bb.set_xmax(grids.width());
chanx_bb.set_ymin(0);
chanx_bb.set_ymax(grids.height());
}
/* Add X-direction clock nodes */
for (size_t iy = 0; iy < grids.height() - 1; ++iy) {
for (size_t ix = 1; ix < grids.width() - 1; ++ix) {
for (size_t iy = chanx_bb.ymin(); iy < chanx_bb.ymax(); ++iy) {
for (size_t ix = chanx_bb.xmin(); ix < chanx_bb.xmax(); ++ix) {
vtr::Point<size_t> chanx_coord(ix, iy);
/* Bypass if the routing channel does not exist when through channels are
* not allowed */
@ -182,8 +204,15 @@ static void add_rr_graph_clock_nodes(
1, 0, ClockTreeId(0), ClockLevelId(0), ClockTreePinId(0), Direction::INC)));
/* Add Y-direction clock nodes */
for (size_t ix = 0; ix < grids.width() - 1; ++ix) {
for (size_t iy = 1; iy < grids.height() - 1; ++iy) {
vtr::Rect<size_t> chany_bb(0, 1, grids.width() - 1, grids.height() - 1);
if (perimeter_cb) {
chany_bb.set_xmin(0);
chany_bb.set_xmax(grids.width());
chany_bb.set_ymin(0);
chany_bb.set_ymax(grids.height());
}
for (size_t ix = chany_bb.xmin(); ix < chany_bb.xmax(); ++ix) {
for (size_t iy = chany_bb.xmin(); iy < chany_bb.ymax(); ++iy) {
vtr::Point<size_t> chany_coord(ix, iy);
/* Bypass if the routing channel does not exist when through channel are
* not allowed */
@ -780,7 +809,8 @@ static void add_rr_graph_clock_edges(
*******************************************************************/
int append_clock_rr_graph(DeviceContext& vpr_device_ctx,
RRClockSpatialLookup& clk_rr_lookup,
const ClockNetwork& clk_ntwk, const bool& verbose) {
const ClockNetwork& clk_ntwk,
const bool& verbose) {
vtr::ScopedStartFinishTimer timer(
"Appending programmable clock network to routing resource graph");