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[Engine] Now GSB output file contains segments name and pin name in SB module

This commit is contained in:
tangxifan 2022-04-10 21:22:30 +08:00
parent 02ee49ba86
commit 755be78b39
3 changed files with 171 additions and 116 deletions
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113
openfpga/src/annotation/write_xml_device_rr_gsb.cpp
View File

@ -13,47 +13,25 @@
#include "openfpga_naming.h"
#include "openfpga_rr_graph_utils.h"
#include "build_routing_module_utils.h"
#include "write_xml_device_rr_gsb.h"
/* begin namespace openfpga */
namespace openfpga {
/***************************************************************************************
* Output internal structure (only the switch block part) of a RRGSB to XML format
* Output the input pin of Programmable Blocks, e.g., CLBs inside a GSB to XML format
***************************************************************************************/
static
void write_rr_switch_block_to_xml(const std::string fname_prefix,
void write_rr_gsb_ipin_connection_to_xml(std::fstream& fp,
const RRGraph& rr_graph,
const RRGSB& rr_gsb,
const bool& verbose) {
/* Prepare file name */
std::string fname(fname_prefix);
vtr::Point<size_t> gsb_coordinate(rr_gsb.get_sb_x(), rr_gsb.get_sb_y());
fname += generate_switch_block_module_name(gsb_coordinate);
fname += ".xml";
VTR_LOGV(verbose,
"Output internal structure of Switch Block to '%s'\n",
fname.c_str());
/* Create a file handler*/
std::fstream fp;
/* Open a file */
fp.open(fname, std::fstream::out | std::fstream::trunc);
const enum e_side& gsb_side) {
/* Validate the file stream */
check_file_stream(fname.c_str(), fp);
valid_file_stream(fp);
/* Output location of the Switch Block */
fp << "<rr_gsb x=\"" << rr_gsb.get_x() << "\" y=\"" << rr_gsb.get_y() << "\""
<< " num_sides=\"" << rr_gsb.get_num_sides() << "\">" << std::endl;
SideManager gsb_side_manager(gsb_side);
/* Output each side */
for (size_t side = 0; side < rr_gsb.get_num_sides(); ++side) {
SideManager gsb_side_manager(side);
enum e_side gsb_side = gsb_side_manager.get_side();
/* Output IPIN nodes */
for (size_t inode = 0; inode < rr_gsb.get_num_ipin_nodes(gsb_side); ++inode) {
const RRNodeId& cur_rr_node = rr_gsb.get_ipin_node(gsb_side, inode);
/* General information of this IPIN */
@ -96,6 +74,22 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
<< ">"
<< std::endl;
}
}
/***************************************************************************************
* Output the routing tracks connections inside a GSB to XML format
***************************************************************************************/
static
void write_rr_gsb_chan_connection_to_xml(std::fstream& fp,
const DeviceGrid& vpr_device_grid,
const VprDeviceAnnotation& vpr_device_annotation,
const RRGraph& rr_graph,
const RRGSB& rr_gsb,
const enum e_side& gsb_side) {
/* Validate the file stream */
valid_file_stream(fp);
SideManager gsb_side_manager(gsb_side);
/* Output chan nodes */
for (size_t inode = 0; inode < rr_gsb.get_chan_width(gsb_side); ++inode) {
@ -115,23 +109,29 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
driver_rr_edges.clear();
}
fp << "\t<" << rr_node_typename[rr_graph.node_type(cur_rr_node)]
t_rr_type cur_node_type = rr_graph.node_type(cur_rr_node);
fp << "\t<" << rr_node_typename[cur_node_type]
<< " side=\"" << gsb_side_manager.to_string()
<< "\" index=\"" << inode
<< "\" node_id=\"" << size_t(cur_rr_node)
<< "\" segment_id=\"" << size_t(src_segment_id)
<< "\" segment_name=\"" << rr_graph.get_segment(src_segment_id).name
<< "\" mux_size=\"" << driver_rr_edges.size()
<< "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(cur_node_type, gsb_side, OUT_PORT)
<< "\">"
<< std::endl;
/* Direct connection: output the node on the opposite side */
if (0 == driver_rr_edges.size()) {
SideManager oppo_side = gsb_side_manager.get_opposite();
fp << "\t\t<driver_node type=\"" << rr_node_typename[rr_graph.node_type(cur_rr_node)]
fp << "\t\t<driver_node type=\"" << rr_node_typename[cur_node_type]
<< "\" side=\"" << oppo_side.to_string()
<< "\" index=\"" << rr_gsb.get_node_index(rr_graph, cur_rr_node, oppo_side.get_side(), IN_PORT)
<< "\" node_id=\"" << size_t(cur_rr_node)
<< "\" segment_id=\"" << size_t(src_segment_id)
<< "\" segment_name=\"" << rr_graph.get_segment(src_segment_id).name
<< "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(cur_node_type, oppo_side.get_side(), IN_PORT)
<< "\"/>"
<< std::endl;
} else {
@ -150,6 +150,7 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
<< "\" index=\"" << driver_node_index
<< "\" node_id=\"" << size_t(driver_rr_node)
<< "\" grid_side=\"" << grid_side.to_string()
<< "\" sb_module_pin_name=\"" << generate_sb_module_grid_port_name(gsb_side, driver_node_side, vpr_device_grid, vpr_device_annotation, rr_graph, cur_rr_node)
<<"\"/>"
<< std::endl;
} else {
@ -159,6 +160,8 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
<< "\" index=\"" << driver_node_index
<< "\" node_id=\"" << size_t(driver_rr_node)
<< "\" segment_id=\"" << size_t(des_segment_id)
<< "\" segment_name=\"" << rr_graph.get_segment(des_segment_id).name
<< "\" sb_module_pin_name=\"" << generate_sb_module_track_port_name(rr_graph.node_type(driver_rr_node), driver_side.get_side(), IN_PORT)
<< "\"/>"
<< std::endl;
}
@ -168,6 +171,50 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
<< ">"
<< std::endl;
}
}
/***************************************************************************************
* Output internal structure (only the switch block part) of a RRGSB to XML format
***************************************************************************************/
static
void write_rr_switch_block_to_xml(const std::string fname_prefix,
const DeviceGrid& vpr_device_grid,
const VprDeviceAnnotation& vpr_device_annotation,
const RRGraph& rr_graph,
const RRGSB& rr_gsb,
const bool& verbose) {
/* Prepare file name */
std::string fname(fname_prefix);
vtr::Point<size_t> gsb_coordinate(rr_gsb.get_sb_x(), rr_gsb.get_sb_y());
fname += generate_switch_block_module_name(gsb_coordinate);
fname += ".xml";
VTR_LOGV(verbose,
"Output internal structure of Switch Block to '%s'\n",
fname.c_str());
/* Create a file handler*/
std::fstream fp;
/* Open a file */
fp.open(fname, std::fstream::out | std::fstream::trunc);
/* Validate the file stream */
check_file_stream(fname.c_str(), fp);
/* Output location of the Switch Block */
fp << "<rr_gsb x=\"" << rr_gsb.get_x() << "\" y=\"" << rr_gsb.get_y() << "\""
<< " num_sides=\"" << rr_gsb.get_num_sides() << "\">" << std::endl;
/* Output each side */
for (size_t side = 0; side < rr_gsb.get_num_sides(); ++side) {
SideManager gsb_side_manager(side);
enum e_side gsb_side = gsb_side_manager.get_side();
/* IPIN nodes and related connections */
write_rr_gsb_ipin_connection_to_xml(fp, rr_graph, rr_gsb, gsb_side);
/* routing-track and related connections */
write_rr_gsb_chan_connection_to_xml(fp, vpr_device_grid, vpr_device_annotation, rr_graph, rr_gsb, gsb_side);
}
fp << "</rr_gsb>"
@ -182,6 +229,8 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
* in a DeviceRRGSB to XML format
***************************************************************************************/
void write_device_rr_gsb_to_xml(const char* sb_xml_dir,
const DeviceGrid& vpr_device_grid,
const VprDeviceAnnotation& vpr_device_annotation,
const RRGraph& rr_graph,
const DeviceRRGSB& device_rr_gsb,
const bool& unique,
@ -201,7 +250,7 @@ void write_device_rr_gsb_to_xml(const char* sb_xml_dir,
VTR_LOG("Only output unique GSB modules to XML\n");
for (size_t igsb = 0; igsb < device_rr_gsb.get_num_gsb_unique_module(); ++igsb) {
const RRGSB& rr_gsb = device_rr_gsb.get_gsb_unique_module(igsb);
write_rr_switch_block_to_xml(xml_dir_name, rr_graph, rr_gsb, verbose);
write_rr_switch_block_to_xml(xml_dir_name, vpr_device_grid, vpr_device_annotation, rr_graph, rr_gsb, verbose);
gsb_counter++;
}
} else {
@ -209,7 +258,7 @@ void write_device_rr_gsb_to_xml(const char* sb_xml_dir,
for (size_t ix = 0; ix < sb_range.x(); ++ix) {
for (size_t iy = 0; iy < sb_range.y(); ++iy) {
const RRGSB& rr_gsb = device_rr_gsb.get_gsb(ix, iy);
write_rr_switch_block_to_xml(xml_dir_name, rr_graph, rr_gsb, verbose);
write_rr_switch_block_to_xml(xml_dir_name, vpr_device_grid, vpr_device_annotation, rr_graph, rr_gsb, verbose);
gsb_counter++;
}
}

4
openfpga/src/annotation/write_xml_device_rr_gsb.h
View File

@ -6,6 +6,8 @@
*******************************************************************/
#include <string>
#include "rr_graph_obj.h"
#include "device_grid.h"
#include "vpr_device_annotation.h"
#include "device_rr_gsb.h"
/********************************************************************
@ -16,6 +18,8 @@
namespace openfpga {
void write_device_rr_gsb_to_xml(const char* sb_xml_dir,
const DeviceGrid& vpr_device_grid,
const VprDeviceAnnotation& vpr_device_annotation,
const RRGraph& rr_graph,
const DeviceRRGSB& device_rr_gsb,
const bool& unique,

2
openfpga/src/base/openfpga_write_gsb.cpp
View File

@ -39,6 +39,8 @@ int write_gsb(const OpenfpgaContext& openfpga_ctx,
std::string sb_file_name = cmd_context.option_value(cmd, opt_file);
write_device_rr_gsb_to_xml(sb_file_name.c_str(),
g_vpr_ctx.device().grid,
openfpga_ctx.vpr_device_annotation(),
g_vpr_ctx.device().rr_graph,
openfpga_ctx.device_rr_gsb(),
cmd_context.option_enable(cmd, opt_unique),