From 6fc29244381ee3f4db1caeb9a70e0ab77178f919 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Sat, 16 Sep 2023 18:16:30 -0700 Subject: [PATCH] [core] syntax --- openfpga/src/base/openfpga_verilog_template.h | 2 +- openfpga/src/fpga_verilog/verilog_routing.cpp | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/openfpga/src/base/openfpga_verilog_template.h b/openfpga/src/base/openfpga_verilog_template.h index 32cb09ee0..7a8db67ea 100644 --- a/openfpga/src/base/openfpga_verilog_template.h +++ b/openfpga/src/base/openfpga_verilog_template.h @@ -63,7 +63,7 @@ int write_fabric_verilog_template(T& openfpga_ctx, const Command& cmd, openfpga_ctx.blwl_shift_register_banks(), openfpga_ctx.arch().circuit_lib, openfpga_ctx.mux_lib(), openfpga_ctx.decoder_lib(), g_vpr_ctx.device(), openfpga_ctx.vpr_device_annotation(), openfpga_ctx.device_rr_gsb(), - openfpga_ctx.fabric_tile(), options); + openfpga_ctx.fabric_tile(), openfpga_ctx.module_name_map(), options); } /******************************************************************** diff --git a/openfpga/src/fpga_verilog/verilog_routing.cpp b/openfpga/src/fpga_verilog/verilog_routing.cpp index 4b990d283..830b3add1 100644 --- a/openfpga/src/fpga_verilog/verilog_routing.cpp +++ b/openfpga/src/fpga_verilog/verilog_routing.cpp @@ -248,6 +248,7 @@ static void print_verilog_routing_switch_box_unique_module( *******************************************************************/ static void print_verilog_flatten_connection_block_modules( NetlistManager& netlist_manager, const ModuleManager& module_manager, + const ModuleNameMap& module_name_map, const DeviceRRGSB& device_rr_gsb, const std::string& subckt_dir, const std::string& subckt_dir_name, const t_rr_type& cb_type, const FabricVerilogOption& options) { @@ -265,7 +266,7 @@ static void print_verilog_flatten_connection_block_modules( continue; } print_verilog_routing_connection_box_unique_module( - netlist_manager, module_manager, subckt_dir, subckt_dir_name, rr_gsb, + netlist_manager, module_manager, module_name_map, subckt_dir, subckt_dir_name, rr_gsb, cb_type, options); } }