diff --git a/openfpga/src/annotation/append_clock_rr_graph.cpp b/openfpga/src/annotation/append_clock_rr_graph.cpp
index 0837e1fcd..f9aadfc74 100644
--- a/openfpga/src/annotation/append_clock_rr_graph.cpp
+++ b/openfpga/src/annotation/append_clock_rr_graph.cpp
@@ -420,14 +420,17 @@ static void try_find_and_add_clock_track2ipin_node(
     t_physical_tile_loc(grid_coord.x(), grid_coord.y(), layer));
   for (std::string tap_pin_name :
        clk_ntwk.tree_flatten_tap_to_ports(clk_tree, clk_pin, grid_coord)) {
+    VTR_LOG("Checking tap pin name: %s\n", tap_pin_name.c_str());
     /* tap pin name could be 'io[5:5].a2f[0]' */
     int grid_pin_idx = find_physical_tile_pin_index(grid_type, tap_pin_name);
     if (grid_pin_idx == grid_type->num_pins) {
       continue;
     }
+    VTR_LOG("Found a valid pin in physical tile\n");
     RRNodeId des_node = rr_graph_view.node_lookup().find_node(
       layer, grid_coord.x(), grid_coord.y(), IPIN, grid_pin_idx, pin_side);
     if (rr_graph_view.valid_node(des_node)) {
+      VTR_LOG("Found a valid pin in rr graph\n");
       des_nodes.push_back(des_node);
     }
   }
diff --git a/openfpga/src/utils/openfpga_physical_tile_utils.cpp b/openfpga/src/utils/openfpga_physical_tile_utils.cpp
index 85768ff92..1cce2eeee 100644
--- a/openfpga/src/utils/openfpga_physical_tile_utils.cpp
+++ b/openfpga/src/utils/openfpga_physical_tile_utils.cpp
@@ -144,9 +144,6 @@ int find_physical_tile_pin_index(t_physical_tile_type_ptr physical_tile,
   }
   PortParser tile_parser(pin_tokens[0]);
   BasicPort tile_info = tile_parser.port();
-  if (tile_info.get_name() != std::string(physical_tile->name)) {
-    return pin_idx;
-  }
   if (!tile_info.is_valid()) {
     VTR_LOG_ERROR(
       "Invalid pin name '%s' whose subtile index is not valid, expect [0, "
@@ -162,13 +159,6 @@ int find_physical_tile_pin_index(t_physical_tile_type_ptr physical_tile,
       pin_name.c_str());
     exit(1);
   }
-  if (tile_info.get_msb() > size_t(physical_tile->capacity) - 1) {
-    VTR_LOG_ERROR(
-      "Invalid pin name '%s' whose subtile index is out of range, expect [0, "
-      "%lu]\n",
-      pin_name.c_str(), physical_tile->capacity - 1);
-    exit(1);
-  }
   /* precheck: return unfound pin if the pin index does not match */
   PortParser pin_parser(pin_tokens[1]);
   BasicPort pin_info = pin_parser.port();
@@ -183,9 +173,17 @@ int find_physical_tile_pin_index(t_physical_tile_type_ptr physical_tile,
 
   /* Spot the subtile by using the index */
   for (const t_sub_tile& sub_tile : physical_tile->sub_tiles) {
-    if (!sub_tile.capacity.is_in_range(tile_info.get_lsb())) {
+    /* Bypass unmatched subtiles*/
+    if (tile_info.get_name() != std::string(sub_tile.name)) {
       continue;
     }
+    if (!sub_tile.capacity.is_in_range(tile_info.get_lsb())) {
+      VTR_LOG_ERROR(
+        "Invalid pin name '%s' whose subtile index is out of range, expect [%lu, "
+        "%lu]\n",
+        pin_name.c_str(), sub_tile.capacity.low, sub_tile.capacity.high);
+      exit(1);
+    }
     for (const t_physical_tile_port& sub_tile_port : sub_tile.ports) {
       if (std::string(sub_tile_port.name) != pin_info.get_name()) {
         continue;