[Flow] ACE is optional duign flow script
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@ -257,17 +257,12 @@ def main():
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logger.info('Running "yosys_vpr" Flow')
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run_yosys_with_abc()
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# TODO Make it optional if activity file is provided
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run_ace2()
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run_pro_blif_3arg()
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if args.power:
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run_ace2()
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run_pro_blif_3arg()
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run_rewrite_verilog()
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if (args.fpga_flow == "vpr_blif"):
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collect_files_for_vpr()
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# if (args.fpga_flow == "vtr"):
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# run_odin2()
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# run_abc_vtr()
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# if (args.fpga_flow == "vtr_standard"):
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# run_abc_for_standarad()
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logger.info("Runing OpenFPGA Shell Engine ")
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run_openfpga_shell()
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if args.end_flow_with_test:
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