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100% limited new flow for flatten bl/wl protocol

This commit is contained in:
Chung Shien Chai 2023-07-21 03:14:26 -07:00
parent 39934f9d16
commit 6c03819c5f
2 changed files with 69 additions and 57 deletions
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14
openfpga/src/fpga_bitstream/build_fabric_bitstream_memory_bank.cpp
View File

@ -228,11 +228,15 @@ static void rec_build_module_fabric_dependent_ql_memory_bank_regional_bitstream(
fabric_bit, wl_addr_bits_vec,
BLWL_PROTOCOL_DECODER != config_protocol.wl_protocol_type());
}
/* New way of storing information in compact way*/
fabric_bitstream.set_memory_bank_info(
fabric_bit, fabric_bitstream_region, cur_bl_index, cur_wl_index,
bl_addr_size, wl_addr_size, bitstream_manager.bit_value(config_bit));
if (BLWL_PROTOCOL_FLATTEN == config_protocol.bl_protocol_type() &&
BLWL_PROTOCOL_FLATTEN == config_protocol.wl_protocol_type()) {
// New way of storing information in compact way
// Only for Flatten protocol (can easily support shift register as well)
// Need to understand decoder to better assessment
fabric_bitstream.set_memory_bank_info(
fabric_bit, fabric_bitstream_region, cur_bl_index, cur_wl_index,
bl_addr_size, wl_addr_size, bitstream_manager.bit_value(config_bit));
}
/* Set data input */
fabric_bitstream.set_bit_din(fabric_bit,

112
openfpga/src/fpga_bitstream/write_xml_fabric_bitstream.cpp
View File

@ -71,8 +71,8 @@ static void write_fabric_bitstream_xml_file_head(
static int write_fabric_config_bit_to_xml_file(
std::fstream& fp, const BitstreamManager& bitstream_manager,
const FabricBitstream& fabric_bitstream, const FabricBitId& fabric_bit,
const e_config_protocol_type& config_type, const int& xml_hierarchy_depth,
std::string& bl_addr, std::string& wl_addr) {
const e_config_protocol_type& config_type, bool fast_xml,
const int& xml_hierarchy_depth, std::string& bl_addr, std::string& wl_addr) {
if (false == valid_file_stream(fp)) {
return 1;
}
@ -107,56 +107,60 @@ static int write_fabric_config_bit_to_xml_file(
case CONFIG_MEM_STANDALONE:
case CONFIG_MEM_SCAN_CHAIN:
break;
case CONFIG_MEM_MEMORY_BANK: {
/* Bit line address */
write_tab_to_file(fp, xml_hierarchy_depth + 1);
fp << "<bl address=\"";
for (const char& addr_bit : fabric_bitstream.bit_bl_address(fabric_bit)) {
fp << addr_bit;
}
fp << "\"/>\n";
write_tab_to_file(fp, xml_hierarchy_depth + 1);
fp << "<wl address=\"";
for (const char& addr_bit : fabric_bitstream.bit_wl_address(fabric_bit)) {
fp << addr_bit;
}
fp << "\"/>\n";
break;
}
case CONFIG_MEM_MEMORY_BANK:
case CONFIG_MEM_QL_MEMORY_BANK: {
// New way of printing XML
// This is fast (less than 100s) as compared to original 1300s seen in
// 100K LE FPFA
const FabricBitstreamMemoryBank* memory_bank =
fabric_bitstream.memory_bank_info();
/* Bit line address */
write_tab_to_file(fp, xml_hierarchy_depth + 1);
const fabric_bit_data& bit =
memory_bank->fabric_bit_datas[(size_t)(fabric_bit)];
const fabric_blwl_length& lengths = memory_bank->blwl_lengths[bit.region];
if (bl_addr.size() == 0) {
VTR_ASSERT(wl_addr.size() == 0);
bl_addr.resize(lengths.bl);
wl_addr.resize(lengths.wl);
memset(&bl_addr[0], 'x', lengths.bl);
memset(&wl_addr[0], '0', lengths.wl);
if (fast_xml) {
// New way of printing XML
// This is fast (less than 100s) as compared to original 1300s seen in
// 100K LE FPFA
const FabricBitstreamMemoryBank* memory_bank =
fabric_bitstream.memory_bank_info();
/* Bit line address */
write_tab_to_file(fp, xml_hierarchy_depth + 1);
const fabric_bit_data& bit =
memory_bank->fabric_bit_datas[(size_t)(fabric_bit)];
const fabric_blwl_length& lengths =
memory_bank->blwl_lengths[bit.region];
if (bl_addr.size() == 0) {
VTR_ASSERT(wl_addr.size() == 0);
bl_addr.resize(lengths.bl);
wl_addr.resize(lengths.wl);
memset(&bl_addr[0], 'x', lengths.bl);
memset(&wl_addr[0], '0', lengths.wl);
} else {
VTR_ASSERT((fabric_size_t)(bl_addr.size()) == lengths.bl);
VTR_ASSERT((fabric_size_t)(wl_addr.size()) == lengths.wl);
}
fp << "<bl address=\"";
memset(&bl_addr[bit.bl], '1', 1);
fp << bl_addr.c_str();
memset(&bl_addr[bit.bl], 'x', 1);
fp << "\"/>\n";
/* Word line address */
write_tab_to_file(fp, xml_hierarchy_depth + 1);
fp << "<wl address=\"";
memset(&wl_addr[bit.wl], '1', 1);
fp << wl_addr.c_str();
memset(&wl_addr[bit.wl], '0', 1);
fp << "\"/>\n";
} else {
VTR_ASSERT((fabric_size_t)(bl_addr.size()) == lengths.bl);
VTR_ASSERT((fabric_size_t)(wl_addr.size()) == lengths.wl);
/* Bit line address */
write_tab_to_file(fp, xml_hierarchy_depth + 1);
fp << "<bl address=\"";
for (const char& addr_bit :
fabric_bitstream.bit_bl_address(fabric_bit)) {
fp << addr_bit;
}
fp << "\"/>\n";
write_tab_to_file(fp, xml_hierarchy_depth + 1);
fp << "<wl address=\"";
for (const char& addr_bit :
fabric_bitstream.bit_wl_address(fabric_bit)) {
fp << addr_bit;
}
fp << "\"/>\n";
}
fp << "<bl address=\"";
memset(&bl_addr[bit.bl], '1', 1);
fp << bl_addr.c_str();
memset(&bl_addr[bit.bl], 'x', 1);
fp << "\"/>\n";
/* Word line address */
write_tab_to_file(fp, xml_hierarchy_depth + 1);
fp << "<wl address=\"";
memset(&wl_addr[bit.wl], '1', 1);
fp << wl_addr.c_str();
memset(&wl_addr[bit.wl], '0', 1);
fp << "\"/>\n";
break;
}
case CONFIG_MEM_FRAME_BASED: {
@ -191,13 +195,15 @@ static int write_fabric_regional_config_bit_to_xml_file(
std::fstream& fp, const BitstreamManager& bitstream_manager,
const FabricBitstream& fabric_bitstream,
const FabricBitRegionId& fabric_region,
const e_config_protocol_type& config_type, const int& xml_hierarchy_depth) {
const e_config_protocol_type& config_type, bool fast_xml,
const int& xml_hierarchy_depth) {
if (false == valid_file_stream(fp)) {
return 1;
}
int status = 0;
// Use string to print, instead of char by char
// This is for Flatten BL/WL protocol
// You will find this much more faster than char by char
// We do not need to build the string for every BL/WL
// It is one-hot and sequal addr
@ -205,7 +211,7 @@ static int write_fabric_regional_config_bit_to_xml_file(
// By setting "1' and resettting ('0' or 'x') at approriate bit position
// We could create one-hot string much faster
// Use FPGA 100K as example: old way needs 1300seconds to write 85Gig XML
/// New way only needs 80seconds to write identical XML
// New way only needs 80seconds to write identical XML
std::string bl_addr = "";
std::string wl_addr = "";
write_tab_to_file(fp, xml_hierarchy_depth);
@ -222,7 +228,7 @@ static int write_fabric_regional_config_bit_to_xml_file(
fabric_bitstream.region_bits(fabric_region)) {
status = write_fabric_config_bit_to_xml_file(
fp, bitstream_manager, fabric_bitstream, fabric_bit, config_type,
xml_hierarchy_depth + 1, bl_addr, wl_addr);
fast_xml, xml_hierarchy_depth + 1, bl_addr, wl_addr);
if (1 == status) {
return status;
}
@ -286,6 +292,8 @@ int write_fabric_bitstream_to_xml_file(
for (const FabricBitRegionId& region : fabric_bitstream.regions()) {
status = write_fabric_regional_config_bit_to_xml_file(
fp, bitstream_manager, fabric_bitstream, region, config_protocol.type(),
BLWL_PROTOCOL_FLATTEN == config_protocol.bl_protocol_type() &&
BLWL_PROTOCOL_FLATTEN == config_protocol.wl_protocol_type(),
xml_hierarchy_depth + 1);
if (1 == status) {
break;