riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge pull request #1878 from lnis-uofu/dependabot/submodules/vtr-verilog-to-routing-39c80f4 

Bump vtr-verilog-to-routing from `6ce3706` to `39c80f4`
This commit is contained in:
tangxifan 2024-10-30 10:48:04 -07:00 committed by GitHub
parent 8ebabd2447 53795797ef
commit 6988f1e249
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
vtr-verilog-to-routing

@ -1 +1 @@
Subproject commit 6ce37060b72c931798410afb1fffb2237adf8aa0 Subproject commit 39c80f444fb37b81681294aadae6dc518f79ac8b