add missing files and try to refactor submodule essential

openfpga_flow/tasks/basic_flow/latest

@@ -1,5 +0,0 @@
-XSym
-0006
-de6ba653dd63797278d7fa829999bf6c
-run003
-                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                         

openfpga_flow/tasks/basic_flow/latest

@@ -0,0 +1 @@
+run002

vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_utils.c

@@ -228,6 +228,17 @@ char* chomp_file_name_postfix(char* file_name) {
   return ret;
 }
 
+void check_file_handler(std::fstream& fp) {
+  /* Make sure we have a valid file handler*/
+  /* Print out debugging information for if the file is not opened/created properly */
+  if (!fp.is_open() || !fp.good()) {
+    vpr_printf(TIO_MESSAGE_ERROR,
+               "(FILE:%s,LINE[%d])Failure in create file!\n",
+               __FILE__, __LINE__); 
+    exit(1);
+  }
+}
+
 
 /* Print SRAM bits, typically in a comment line */
 void fprint_commented_sram_bits(FILE* fp,

vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_utils.h

@@ -1,9 +1,13 @@
 #ifndef FPGA_X2P_UTILS_H
 #define FPGA_X2P_UTILS_H
 
+#include <fstream>
+
 #include "my_free_fwd.h"
 #include "rr_blocks_naming.h"
 
+void check_file_handler(std::fstream& fp);
+
 char* my_gettime();
 
 char* format_dir_path(char* dir_path);

vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_submodule_essential.cpp

@@ -0,0 +1,41 @@
+/************************************************
+ * Header file for verilog_submodule_essential.cpp
+ * Include function declaration on 
+ * outputting Verilog netlists for essential gates
+ * which are inverters, buffers, transmission-gates
+ * logic gates etc. 
+ ***********************************************/
+#include <fstream>
+#include "vtr_assert.h"
+
+/* Device-level header files */
+#include "spice_types.h"
+
+/* FPGA-X2P context header files */
+#include "fpga_x2p_utils.h"
+
+/* FPGA-Verilog context header files */
+#include "verilog_global.h"
+#include "verilog_submodule_essential.h"
+
+void dump_verilog_submodule_essentials(const std::string& verilog_dir, 
+                                       const std::string& submodule_dir,
+                                       const CircuitLibrary& circuit_lib) {
+  std::string verilog_fname = submodule_dir + essentials_verilog_file_name;
+  std::fstream fp;
+
+  /* Create the file stream */
+  fp.open(verilog_fname, std::fstream::out | std::fstream::trunc);
+  /* Check if the file stream if valid or not */
+  check_file_handler(fp); 
+
+  /* Create file */
+  vpr_printf(TIO_MESSAGE_INFO,
+             "Generating Verilog netlist (%s) for essential gates...\n",
+             __FILE__, __LINE__, essentials_verilog_file_name); 
+  
+  /* Close file handler*/
+  fp.close();
+
+  return;
+}

vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_submodule_essential.h

@@ -0,0 +1,19 @@
+/************************************************
+ * Header file for verilog_submodule_essential.cpp
+ * Include function declaration on 
+ * outputting Verilog netlists for essential gates
+ * which are inverters, buffers, transmission-gates
+ * logic gates etc. 
+ ***********************************************/
+
+#ifndef VERILOG_SUBMODULE_ESSENTIAL_H
+#define VERILOG_SUBMODULE_ESSENTIAL_H
+
+#include <string>
+#include "circuit_library.h"
+
+void dump_verilog_submodule_essentials(const std::string& verilog_dir, 
+                                       const std::string& submodule_dir,
+                                       const CircuitLibrary& circuit_lib);
+
+#endif

vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_submodule_mux.cpp

@@ -18,10 +18,10 @@
 /* FPGA-X2P context header files */
 #include "spice_types.h"
 #include "fpga_x2p_naming.h"
+#include "fpga_x2p_utils.h"
 
 /* FPGA-Verilog context header files */
 #include "verilog_global.h"
-#include "verilog_utils.h"
 #include "verilog_writer_utils.h"
 #include "verilog_submodule_mux.h"
 

vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_utils.c

@@ -144,17 +144,6 @@ void dump_include_user_defined_verilog_netlists(FILE* fp,
   return;
 }
 
-void check_file_handler(std::fstream& fp) {
-  /* Make sure we have a valid file handler*/
-  /* Print out debugging information for if the file is not opened/created properly */
-  if (!fp.is_open() || !fp.good()) {
-    vpr_printf(TIO_MESSAGE_ERROR,
-               "(FILE:%s,LINE[%d])Failure in create file!\n",
-               __FILE__, __LINE__); 
-    exit(1);
-  }
-}
-
 void dump_verilog_file_header(FILE* fp,
                               char* usage) {
   if (NULL == fp) {

vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_utils.h

@@ -1,8 +1,6 @@
 #ifndef VERILOG_UTILS_H
 #define VERILOG_UTILS_H
 
-#include <fstream>
-
 void init_list_include_verilog_netlists(t_spice* spice);
 
 void init_include_user_defined_verilog_netlists(t_spice spice);
@@ -10,8 +8,6 @@ void init_include_user_defined_verilog_netlists(t_spice spice);
 void dump_include_user_defined_verilog_netlists(FILE* fp,
                                                 t_spice spice);
 
-void check_file_handler(std::fstream& fp);
-
 void dump_verilog_file_header(FILE* fp,
                               char* usage);