From 60dd37e08603c5a863651a35ca4aac2037885dcc Mon Sep 17 00:00:00 2001 From: tangxifan Date: Thu, 11 Jun 2020 12:05:12 -0600 Subject: [PATCH] remove simulation settings from openfpga arch XML update travis to split CI tests fix errors in travis configuration fixing travis errors in scripts keep fixing travis fix travis on build.sh bug fixing in travis CI bug fix in travis regression test run fixing bugs in the travis scripts bug fix in travis script: remove common.sh in regression test call keep bug fixing in travis --- .travis.yml | 180 +++++++++--------- .travis/build.sh | 17 ++ .travis/install.sh | 25 +-- .travis/openfpga_vpr7_reg_test.sh | 30 +++ .../{script.sh => openfpga_vpr8_reg_test.sh} | 39 +--- .../k4_N4_40nm_bank_openfpga.xml | 33 ---- .../openfpga_arch/k4_N4_40nm_cc_openfpga.xml | 33 ---- .../k4_N4_40nm_fixed_sim_openfpga.xml | 33 ---- .../k4_N4_40nm_frame_openfpga.xml | 33 ---- .../k4_N4_40nm_standalone_openfpga.xml | 33 ---- .../openfpga_arch/k6_N10_40nm_openfpga.xml | 33 ---- ..._N10_intermediate_buffer_40nm_openfpga.xml | 33 ---- .../k6_frac_N10_40nm_openfpga.xml | 34 ---- .../k6_frac_N10_adder_chain_40nm_openfpga.xml | 34 ---- ...c_N10_adder_chain_mem16K_40nm_openfpga.xml | 34 ---- ...0_adder_chain_mem16K_aib_40nm_openfpga.xml | 34 ---- ...c_N10_adder_column_chain_40nm_openfpga.xml | 34 ---- ...N10_adder_register_chain_40nm_openfpga.xml | 34 ---- ...dder_register_scan_chain_40nm_openfpga.xml | 34 ---- ...ister_scan_chain_depop50_40nm_openfpga.xml | 34 ---- ...can_chain_depop50_spypad_40nm_openfpga.xml | 34 ---- .../k6_frac_N10_behavioral_40nm_openfpga.xml | 34 ---- ...6_frac_N10_local_encoder_40nm_openfpga.xml | 34 ---- .../k6_frac_N10_spyio_40nm_openfpga.xml | 34 ---- .../k6_frac_N10_stdcell_mux_40nm_openfpga.xml | 34 ---- .../k6_frac_N10_tree_mux_40nm_openfpga.xml | 34 ---- 26 files changed, 148 insertions(+), 850 deletions(-) create mode 100644 .travis/build.sh create mode 100755 .travis/openfpga_vpr7_reg_test.sh rename .travis/{script.sh => openfpga_vpr8_reg_test.sh} (82%) diff --git a/.travis.yml b/.travis.yml index 0b5ce92fb..13b89c162 100644 --- a/.travis.yml +++ b/.travis.yml @@ -14,105 +14,99 @@ cache: # Currently sudo is not required, NO ENV is used # Supported Operating systems -#os: -# - linux -# - osx -# Create a matrix to branch the building environment -matrix: - include: - - os: linux - # Compiler is specified in ./travis/common.sh - sudo: false - dist: bionic - compiler: g++-8 - addons: - apt: - sources: - - ubuntu-toolchain-r-test # For newer GCC - - llvm_toolchain-trusty-7 - packages: - - autoconf - - automake - - bash - - bison - - build-essential - - cmake - - ctags - - curl - - doxygen - - flex - - fontconfig - - g++-8 - - gcc-8 - - gdb - - git - - gperf - - iverilog - - libcairo2-dev - - libevent-dev - - libfontconfig1-dev - - liblist-moreutils-perl - - libncurses5-dev - - libx11-dev - - libxft-dev - - libxml++2.6-dev - - perl - - python - - python-lxml - - texinfo - - time - - valgrind - - zip - - qt5-default - - clang-format-7 -# - os: osx -# osx_image: xcode10.2 # we target latest MacOS Mojave -# sudo: true -# compiler: gcc-4.9 # Use clang instead of gcc in MacOS -# addons: -# homebrew: -# packages: -# - bison -# - cmake -# - ctags -# - flex -# - fontconfig -# - git -# - gcc@6 -# - gcc@4.9 -# - gawk -# - icarus-verilog -# - libxml++ -# - qt5 +dist: bionic +compiler: g++-8 +addons: + apt: + sources: + - ubuntu-toolchain-r-test # For newer GCC + - llvm_toolchain-trusty-7 + packages: + - autoconf + - automake + - bash + - bison + - build-essential + - cmake + - ctags + - curl + - doxygen + - flex + - fontconfig + - g++-8 + - gcc-8 + - gdb + - git + - gperf + - iverilog + - libcairo2-dev + - libevent-dev + - libfontconfig1-dev + - liblist-moreutils-perl + - libncurses5-dev + - libx11-dev + - libxft-dev + - libxml++2.6-dev + - perl + - python + - python-lxml + - texinfo + - time + - valgrind + - zip + - qt5-default + - clang-format-7 +#- os: osx +# osx_image: xcode10.2 # we target latest MacOS Mojave +# sudo: true +# compiler: gcc-4.9 # Use clang instead of gcc in MacOS +# addons: +# homebrew: +# packages: +# - bison +# - cmake +# - ctags +# - flex +# - fontconfig +# - git +# - gcc@6 +# - gcc@4.9 +# - gawk +# - icarus-verilog +# - libxml++ +# - qt5 -before_install: +before_script: - source .travis/common.sh - -install: - - DEPS_DIR="${HOME}/deps" - - mkdir -p ${DEPS_DIR} && cd ${DEPS_DIR} - - | - if [[ "${TRAVIS_OS_NAME}" == "linux" ]]; then - CMAKE_URL="https://cmake.org/files/v3.16/cmake-3.16.3-Linux-x86_64.tar.gz" - mkdir -p cmake && travis_retry wget --no-clobber --no-check-certificate --quiet -O - ${CMAKE_URL} | tar --strip-components=1 -xz -C cmake - export PATH=${DEPS_DIR}/cmake/bin:${PATH} - echo ${PATH} - else - brew install cmake || brew upgrade cmake - fi - - cmake --version - - cd - - source .travis/install.sh +stages: + - name: Test + if: type != cron + +jobs: + include: + - stage: Test + name: "OpenFPGA + VPR7 regression tests" + script: + - source .travis/build.sh + - source .travis/openfpga_vpr7_reg_test.sh + + - stage: Test + name: "OpenFPGA + VPR8 regression tests" + script: + - source .travis/build.sh + - source .travis/openfpga_vpr8_reg_test.sh + +#after_failure: +# - .travis/after_failure.sh + +#after_success: +# - .travis/after_success.sh + script: - - .travis/script.sh - #- .travis/regression.sh + - true -after_failure: - - .travis/after_failure.sh - -after_success: - - .travis/after_success.sh notifications: slack: secure: L8tzicFh+EKcK21GBA2m3rQ3jmnDdqiRXIZcb0iqYlhT0V5asYvCqwlpPDUDV1wmBXqPgRJBI/jitAJlKFWu74pLTVc6FscUIDYM7S0DJfHEcufLknZx88lMmmV0IsYLQe3/s89tWoudMf1bNBo/8YWzLDffqUQ7s/rTPD9SWLppb01X0Xm158oDlA0rWETs35nuNFgJxWcSyIyIvnRNE3dHjzmBETUR9mYDsUSYlcOI44FMD8rE6emicdkqdn1zVxScobrl4Dt2bPsMfKopgIKK1x+38AuaqQa7t5F5ICnF0WfxmQ6/TcRNwIij0fDu68w/fcU8SyV+Ex5aZBKYUU7PG7ELTOq+q1geDoTlbguvFSIT4EzqErc4hbJmcUn79BKLhdjshZtGihKatntJx2faXYNYGFjwmnPFRYpqsozydztgMjzv4prZ5yoh7jhoDiGj44QcpXlQ9otM17JdfqveowMLHBYzATsxIRG93irZfXG/E3S8FvXg8mYOIEn8UK7H6i8VWL3JHlw8RbpLdNLswZOUlpEaDAeTm5tvYcw7FGH2nlZ2e5aXLxN6dTovSSRztQHbWdJTGG0N+xldBXcCiChmok4nXGReIkMc+99nZjRsiCB0R16tCNb25/p7NAVkItfVe1qRTzdnhi1hdE7LPURK4kxoFRJ6sFVuYjw= diff --git a/.travis/build.sh b/.travis/build.sh new file mode 100644 index 000000000..d7d2fcef9 --- /dev/null +++ b/.travis/build.sh @@ -0,0 +1,17 @@ +#!/bin/bash + +source .travis/common.sh +set -e + +start_section "OpenFPGA.build" "${GREEN}Building..${NC}" +cd ${TRAVIS_BUILD_DIR} +mkdir build +cd build + +if [[ $TRAVIS_OS_NAME == 'osx' ]]; then + cmake .. -DCMAKE_BUILD_TYPE=debug -DENABLE_VPR_GRAPHICS=off +else + cmake .. -DCMAKE_BUILD_TYPE=debug +fi + make -j16 +end_section "OpenFPGA.build" diff --git a/.travis/install.sh b/.travis/install.sh index 46d535342..23841212d 100755 --- a/.travis/install.sh +++ b/.travis/install.sh @@ -4,18 +4,19 @@ source .travis/common.sh set -e ## Install necessary package which is not available on Travis CI -#export DEPS_DIR="${HOME}/deps" -#mkdir -p ${DEPS_DIR} && cd ${DEPS_DIR} -## Install CMake -#if [[ "${TRAVIS_OS_NAME}" == "linux" ]]; then -# export CMAKE_URL="https://cmake.org/files/v3.13/cmake-3.13.0-rc3-Linux-x86_64.tar.gz" -# mkdir -p cmake && travis_retry wget --no-check-certificate --quiet -O - ${CMAKE_URL} | tar --strip-components=1 -xz -C cmake -# export PATH=${DEPS_DIR}/cmake/bin:${PATH} -# echo ${PATH} -#else -# brew install cmake || brew upgrade cmake -#fi -# cmake --version +export DEPS_DIR="${HOME}/deps" +mkdir -p ${DEPS_DIR} && cd ${DEPS_DIR} +# Install CMake +if [[ "${TRAVIS_OS_NAME}" == "linux" ]]; then + export CMAKE_URL="https://cmake.org/files/v3.16/cmake-3.16.3-Linux-x86_64.tar.gz" + mkdir -p cmake && travis_retry wget --no-check-certificate --quiet -O - ${CMAKE_URL} | tar --strip-components=1 -xz -C cmake + export PATH=${DEPS_DIR}/cmake/bin:${PATH} + echo ${PATH} +else + brew install cmake || brew upgrade cmake +fi +cmake --version +cd - # ## Install latest iVerilog. Since no deb is provided, compile from source codes #if [[ "${TRAVIS_OS_NAME}" == "linux" ]]; then diff --git a/.travis/openfpga_vpr7_reg_test.sh b/.travis/openfpga_vpr7_reg_test.sh new file mode 100755 index 000000000..c04d202a4 --- /dev/null +++ b/.travis/openfpga_vpr7_reg_test.sh @@ -0,0 +1,30 @@ +#!/bin/bash +set -e + +start_section "OpenFPGA+VPR7.TaskTun" "${GREEN}..Running_Regression..${NC}" +cd ${TRAVIS_BUILD_DIR} + +############################################### +# OpenFPGA with VPR7 +# TO BE DEPRECATED +############################################## +echo -e "Testing single-mode architectures"; +python3 openfpga_flow/scripts/run_fpga_task.py single_mode --debug --show_thread_logs +#python3 openfpga_flow/scripts/run_fpga_task.py s298 + +echo -e "Testing multi-mode architectures"; +python3 openfpga_flow/scripts/run_fpga_task.py multi_mode --maxthreads 4 --debug --show_thread_logs + +echo -e "Testing compact routing techniques"; +python3 openfpga_flow/scripts/run_fpga_task.py compact_routing --debug --show_thread_logs + +echo -e "Testing tileable architectures"; +python3 openfpga_flow/scripts/run_fpga_task.py tileable_routing --debug --show_thread_logs + +echo -e "Testing Verilog generation with explicit port mapping "; +python3 openfpga_flow/scripts/run_fpga_task.py explicit_verilog --debug --show_thread_logs + +echo -e "Testing Verilog generation with grid pin duplication "; +python3 openfpga_flow/scripts/run_fpga_task.py duplicate_grid_pin --debug --show_thread_logs + +end_section "OpenFPGA+VPR7.TaskTun" diff --git a/.travis/script.sh b/.travis/openfpga_vpr8_reg_test.sh similarity index 82% rename from .travis/script.sh rename to .travis/openfpga_vpr8_reg_test.sh index 907e1a3cf..046f8210f 100755 --- a/.travis/script.sh +++ b/.travis/openfpga_vpr8_reg_test.sh @@ -1,46 +1,9 @@ #!/bin/bash -source .travis/common.sh set -e -start_section "OpenFPGA.build" "${GREEN}Building..${NC}" -mkdir build -cd build - -if [[ $TRAVIS_OS_NAME == 'osx' ]]; then - cmake .. -DCMAKE_BUILD_TYPE=debug -DENABLE_VPR_GRAPHICS=off -else - cmake .. -DCMAKE_BUILD_TYPE=debug -fi - make -j16 -end_section "OpenFPGA.build" - - start_section "OpenFPGA.TaskTun" "${GREEN}..Running_Regression..${NC}" -cd - - -############################################### -# OpenFPGA with VPR7 -# TO BE DEPRECATED -############################################## -echo -e "Testing single-mode architectures"; -python3 openfpga_flow/scripts/run_fpga_task.py single_mode --debug --show_thread_logs -#python3 openfpga_flow/scripts/run_fpga_task.py s298 - -echo -e "Testing multi-mode architectures"; -python3 openfpga_flow/scripts/run_fpga_task.py multi_mode --maxthreads 4 --debug --show_thread_logs - -echo -e "Testing compact routing techniques"; -python3 openfpga_flow/scripts/run_fpga_task.py compact_routing --debug --show_thread_logs - -echo -e "Testing tileable architectures"; -python3 openfpga_flow/scripts/run_fpga_task.py tileable_routing --debug --show_thread_logs - -echo -e "Testing Verilog generation with explicit port mapping "; -python3 openfpga_flow/scripts/run_fpga_task.py explicit_verilog --debug --show_thread_logs - -echo -e "Testing Verilog generation with grid pin duplication "; -python3 openfpga_flow/scripts/run_fpga_task.py duplicate_grid_pin --debug --show_thread_logs +cd ${TRAVIS_BUILD_DIR} ############################################### # OpenFPGA Shell with VPR8 diff --git a/openfpga_flow/openfpga_arch/k4_N4_40nm_bank_openfpga.xml b/openfpga_flow/openfpga_arch/k4_N4_40nm_bank_openfpga.xml index fe7d3f1b8..14a7881ef 100644 --- a/openfpga_flow/openfpga_arch/k4_N4_40nm_bank_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k4_N4_40nm_bank_openfpga.xml @@ -193,36 +193,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k4_N4_40nm_cc_openfpga.xml b/openfpga_flow/openfpga_arch/k4_N4_40nm_cc_openfpga.xml index 298e0c0c0..13eb292b0 100644 --- a/openfpga_flow/openfpga_arch/k4_N4_40nm_cc_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k4_N4_40nm_cc_openfpga.xml @@ -193,36 +193,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k4_N4_40nm_fixed_sim_openfpga.xml b/openfpga_flow/openfpga_arch/k4_N4_40nm_fixed_sim_openfpga.xml index 677061785..13eb292b0 100644 --- a/openfpga_flow/openfpga_arch/k4_N4_40nm_fixed_sim_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k4_N4_40nm_fixed_sim_openfpga.xml @@ -193,36 +193,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k4_N4_40nm_frame_openfpga.xml b/openfpga_flow/openfpga_arch/k4_N4_40nm_frame_openfpga.xml index a0e0194b5..da2322044 100644 --- a/openfpga_flow/openfpga_arch/k4_N4_40nm_frame_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k4_N4_40nm_frame_openfpga.xml @@ -194,36 +194,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k4_N4_40nm_standalone_openfpga.xml b/openfpga_flow/openfpga_arch/k4_N4_40nm_standalone_openfpga.xml index fc97f75c1..05b096a03 100644 --- a/openfpga_flow/openfpga_arch/k4_N4_40nm_standalone_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k4_N4_40nm_standalone_openfpga.xml @@ -194,36 +194,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_N10_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_N10_40nm_openfpga.xml index e6e53d9f6..9512672a9 100644 --- a/openfpga_flow/openfpga_arch/k6_N10_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_N10_40nm_openfpga.xml @@ -193,36 +193,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_N10_intermediate_buffer_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_N10_intermediate_buffer_40nm_openfpga.xml index b211bd040..2127c0b3c 100644 --- a/openfpga_flow/openfpga_arch/k6_N10_intermediate_buffer_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_N10_intermediate_buffer_40nm_openfpga.xml @@ -194,36 +194,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_40nm_openfpga.xml index 9b20ab2a2..222d0d3e6 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_40nm_openfpga.xml @@ -224,37 +224,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_40nm_openfpga.xml index 10051a9ca..be9bd0d3b 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_40nm_openfpga.xml @@ -249,37 +249,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_40nm_openfpga.xml index 40a451b55..6dfb6ac71 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_40nm_openfpga.xml @@ -266,37 +266,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_aib_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_aib_40nm_openfpga.xml index 9e608ead9..81dfd17ce 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_aib_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_chain_mem16K_aib_40nm_openfpga.xml @@ -278,37 +278,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_column_chain_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_column_chain_40nm_openfpga.xml index 79b82375f..9a5d94056 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_column_chain_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_column_chain_40nm_openfpga.xml @@ -249,37 +249,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_chain_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_chain_40nm_openfpga.xml index 33cfa9e61..d2cb8a163 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_chain_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_chain_40nm_openfpga.xml @@ -252,37 +252,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_40nm_openfpga.xml index 460c8743e..129e11f71 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_40nm_openfpga.xml @@ -258,37 +258,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_depop50_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_depop50_40nm_openfpga.xml index 4bb4a24a2..f22ec1fc9 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_depop50_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_depop50_40nm_openfpga.xml @@ -253,37 +253,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_depop50_spypad_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_depop50_spypad_40nm_openfpga.xml index e1dde16b6..650e30a6b 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_depop50_spypad_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_adder_register_scan_chain_depop50_spypad_40nm_openfpga.xml @@ -337,37 +337,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_behavioral_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_behavioral_40nm_openfpga.xml index ebad2d203..2d6a765d0 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_behavioral_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_behavioral_40nm_openfpga.xml @@ -224,37 +224,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_local_encoder_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_local_encoder_40nm_openfpga.xml index b32deb8a9..b351666a7 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_local_encoder_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_local_encoder_40nm_openfpga.xml @@ -224,37 +224,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_spyio_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_spyio_40nm_openfpga.xml index c980065bb..94c8f9fb8 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_spyio_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_spyio_40nm_openfpga.xml @@ -228,37 +228,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_stdcell_mux_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_stdcell_mux_40nm_openfpga.xml index 2b42cdced..794f10d4f 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_stdcell_mux_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_stdcell_mux_40nm_openfpga.xml @@ -216,37 +216,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/openfpga_flow/openfpga_arch/k6_frac_N10_tree_mux_40nm_openfpga.xml b/openfpga_flow/openfpga_arch/k6_frac_N10_tree_mux_40nm_openfpga.xml index c26c30f31..e9081fa86 100644 --- a/openfpga_flow/openfpga_arch/k6_frac_N10_tree_mux_40nm_openfpga.xml +++ b/openfpga_flow/openfpga_arch/k6_frac_N10_tree_mux_40nm_openfpga.xml @@ -215,37 +215,3 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -