[core] add a new option map_global_net_to_msb for pb_pin_fixup
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@ -32,7 +32,9 @@ namespace openfpga {
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static int update_cluster_pin_global_net_with_post_routing_results(
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const ClusteringContext& clustering_ctx,
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VprClusteringAnnotation& clustering_annotation, const ClusterBlockId& blk_id,
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t_logical_block_type_ptr logical_block, size_t& num_fixup,
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t_logical_block_type_ptr logical_block,
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const bool& map_gnet2msb,
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size_t& num_fixup,
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const bool& verbose) {
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/* Reassign global nets to unused pins in the same port where they were mapped
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* NO optimization is done here!!! First find first fit
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@ -78,9 +80,13 @@ static int update_cluster_pin_global_net_with_post_routing_results(
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clustering_ctx.clb_nlist.net_name(global_net_id).c_str());
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size_t cand_pin_start = pb_type_pin - pb_graph_pin->pin_number;
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size_t cand_pin_end = cand_pin_start + pb_graph_pin->port->num_pins;
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std::vector<size_t> cand_pins(pb_graph_pin->port->num_pins);
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std::itoa(cand_pins.begin(), cand_pins.end(), cand_pin_start);
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if (map_gnet2msb) {
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std::reverse(cand_pins.begin(), cand_pins.end());
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}
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bool found_cand = false;
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for (size_t cand_pin = cand_pin_start; cand_pin < cand_pin_end;
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++cand_pin) {
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for (size_t cand_pin : cand_pins) {
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ClusterNetId cand_pin_net_id =
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clustering_ctx.clb_nlist.block_net(blk_id, cand_pin);
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const t_pb_graph_pin* cand_pb_graph_pin =
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@ -139,6 +145,7 @@ static int update_cluster_pin_with_post_routing_results(
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VprClusteringAnnotation& vpr_clustering_annotation, const size_t& layer,
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const vtr::Point<size_t>& grid_coord, const ClusterBlockId& blk_id,
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const e_side& border_side, const size_t& z, const bool& perimeter_cb,
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const bool& map_gnet2msb,
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size_t& num_fixup, const bool& verbose) {
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int status = CMD_EXEC_SUCCESS;
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/* Handle each pin */
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@ -337,7 +344,7 @@ static int update_cluster_pin_with_post_routing_results(
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}
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/* 2nd round of fixup: focus on global nets */
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status = update_cluster_pin_global_net_with_post_routing_results(
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clustering_ctx, vpr_clustering_annotation, blk_id, logical_block, num_fixup,
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clustering_ctx, vpr_clustering_annotation, blk_id, logical_block, map_gnet2msb, num_fixup,
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verbose);
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return status;
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}
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@ -351,9 +358,12 @@ int update_pb_pin_with_post_routing_results(
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const PlacementContext& placement_ctx,
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const VprRoutingAnnotation& vpr_routing_annotation,
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VprClusteringAnnotation& vpr_clustering_annotation, const bool& perimeter_cb,
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const bool& map_gnet2msb,
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const bool& verbose) {
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int status = CMD_EXEC_SUCCESS;
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size_t num_fixup = 0;
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/* Confirm options */
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VTR_LOGV(verbose && map_gnet2msb, "User choose to map global net to the best fit MSB of input port\n")
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/* Ensure a clean start: remove all the remapping results from VTR's
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* post-routing clustering result sync-up */
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vpr_clustering_annotation.clear_net_remapping();
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@ -384,7 +394,7 @@ int update_pb_pin_with_post_routing_results(
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device_ctx, clustering_ctx, vpr_routing_annotation,
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vpr_clustering_annotation, layer, grid_coord, cluster_blk_id,
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NUM_SIDES, placement_ctx.block_locs[cluster_blk_id].loc.sub_tile,
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perimeter_cb, num_fixup, verbose);
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perimeter_cb, map_gnet2msb, num_fixup, verbose);
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if (status != CMD_EXEC_SUCCESS) {
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return CMD_EXEC_FATAL_ERROR;
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}
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@ -419,7 +429,7 @@ int update_pb_pin_with_post_routing_results(
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device_ctx, clustering_ctx, vpr_routing_annotation,
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vpr_clustering_annotation, layer, io_coord, cluster_blk_id, io_side,
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placement_ctx.block_locs[cluster_blk_id].loc.sub_tile, perimeter_cb,
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num_fixup, verbose);
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map_gnet2msb, num_fixup, verbose);
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if (status != CMD_EXEC_SUCCESS) {
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return CMD_EXEC_FATAL_ERROR;
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}
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@ -19,6 +19,7 @@ int update_pb_pin_with_post_routing_results(
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const PlacementContext& placement_ctx,
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const VprRoutingAnnotation& vpr_routing_annotation,
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VprClusteringAnnotation& vpr_clustering_annotation, const bool& perimeter_cb,
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const bool& map_gnet2msb,
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const bool& verbose);
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} /* end namespace openfpga */
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@ -35,6 +35,7 @@ int pb_pin_fixup_template(T& openfpga_context, const Command& cmd,
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vtr::ScopedStartFinishTimer timer(
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"Fix up pb pin mapping results after routing optimization");
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CommandOptionId opt_map_gnet2msb = cmd.option("map_global_net_to_msb");
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CommandOptionId opt_verbose = cmd.option("verbose");
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/* Apply fix-up to each grid */
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@ -43,6 +44,7 @@ int pb_pin_fixup_template(T& openfpga_context, const Command& cmd,
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openfpga_context.vpr_routing_annotation(),
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openfpga_context.mutable_vpr_clustering_annotation(),
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g_vpr_ctx.device().arch->perimeter_cb,
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cmd_context.option_enable(cmd, opt_map_gnet2msb),
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cmd_context.option_enable(cmd, opt_verbose));
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}
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@ -324,6 +324,8 @@ ShellCommandId add_pb_pin_fixup_command_template(
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const std::vector<ShellCommandId>& dependent_cmds, const bool& hidden) {
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Command shell_cmd("pb_pin_fixup");
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/* Add an option '--map_global_net_to_msb' */
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shell_cmd.add_option("map_global_net_to_msb", false, "If specified, any global net including clock, reset etc, will be mapped to a best-fit Most Significant Bit (MSB) of input ports of programmable blocks. If not specified, a best-fit Least Significant Bit (LSB) will be the default choice");
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/* Add an option '--verbose' */
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shell_cmd.add_option("verbose", false, "Show verbose outputs");
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